esp32/mcpwm0/ch/
carrier_cfg.rs

1#[doc = "Register `CARRIER_CFG` reader"]
2pub type R = crate::R<CARRIER_CFG_SPEC>;
3#[doc = "Register `CARRIER_CFG` writer"]
4pub type W = crate::W<CARRIER_CFG_SPEC>;
5#[doc = "Field `EN` reader - "]
6pub type EN_R = crate::BitReader;
7#[doc = "Field `EN` writer - "]
8pub type EN_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `PRESCALE` reader - "]
10pub type PRESCALE_R = crate::FieldReader;
11#[doc = "Field `PRESCALE` writer - "]
12pub type PRESCALE_W<'a, REG> = crate::FieldWriter<'a, REG, 4>;
13#[doc = "Field `DUTY` reader - "]
14pub type DUTY_R = crate::FieldReader;
15#[doc = "Field `DUTY` writer - "]
16pub type DUTY_W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
17#[doc = "Field `OSHTWTH` reader - "]
18pub type OSHTWTH_R = crate::FieldReader;
19#[doc = "Field `OSHTWTH` writer - "]
20pub type OSHTWTH_W<'a, REG> = crate::FieldWriter<'a, REG, 4>;
21#[doc = "Field `OUT_INVERT` reader - "]
22pub type OUT_INVERT_R = crate::BitReader;
23#[doc = "Field `OUT_INVERT` writer - "]
24pub type OUT_INVERT_W<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `IN_INVERT` reader - "]
26pub type IN_INVERT_R = crate::BitReader;
27#[doc = "Field `IN_INVERT` writer - "]
28pub type IN_INVERT_W<'a, REG> = crate::BitWriter<'a, REG>;
29impl R {
30    #[doc = "Bit 0"]
31    #[inline(always)]
32    pub fn en(&self) -> EN_R {
33        EN_R::new((self.bits & 1) != 0)
34    }
35    #[doc = "Bits 1:4"]
36    #[inline(always)]
37    pub fn prescale(&self) -> PRESCALE_R {
38        PRESCALE_R::new(((self.bits >> 1) & 0x0f) as u8)
39    }
40    #[doc = "Bits 5:7"]
41    #[inline(always)]
42    pub fn duty(&self) -> DUTY_R {
43        DUTY_R::new(((self.bits >> 5) & 7) as u8)
44    }
45    #[doc = "Bits 8:11"]
46    #[inline(always)]
47    pub fn oshtwth(&self) -> OSHTWTH_R {
48        OSHTWTH_R::new(((self.bits >> 8) & 0x0f) as u8)
49    }
50    #[doc = "Bit 12"]
51    #[inline(always)]
52    pub fn out_invert(&self) -> OUT_INVERT_R {
53        OUT_INVERT_R::new(((self.bits >> 12) & 1) != 0)
54    }
55    #[doc = "Bit 13"]
56    #[inline(always)]
57    pub fn in_invert(&self) -> IN_INVERT_R {
58        IN_INVERT_R::new(((self.bits >> 13) & 1) != 0)
59    }
60}
61#[cfg(feature = "impl-register-debug")]
62impl core::fmt::Debug for R {
63    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
64        f.debug_struct("CARRIER_CFG")
65            .field("en", &self.en())
66            .field("prescale", &self.prescale())
67            .field("duty", &self.duty())
68            .field("oshtwth", &self.oshtwth())
69            .field("out_invert", &self.out_invert())
70            .field("in_invert", &self.in_invert())
71            .finish()
72    }
73}
74impl W {
75    #[doc = "Bit 0"]
76    #[inline(always)]
77    pub fn en(&mut self) -> EN_W<CARRIER_CFG_SPEC> {
78        EN_W::new(self, 0)
79    }
80    #[doc = "Bits 1:4"]
81    #[inline(always)]
82    pub fn prescale(&mut self) -> PRESCALE_W<CARRIER_CFG_SPEC> {
83        PRESCALE_W::new(self, 1)
84    }
85    #[doc = "Bits 5:7"]
86    #[inline(always)]
87    pub fn duty(&mut self) -> DUTY_W<CARRIER_CFG_SPEC> {
88        DUTY_W::new(self, 5)
89    }
90    #[doc = "Bits 8:11"]
91    #[inline(always)]
92    pub fn oshtwth(&mut self) -> OSHTWTH_W<CARRIER_CFG_SPEC> {
93        OSHTWTH_W::new(self, 8)
94    }
95    #[doc = "Bit 12"]
96    #[inline(always)]
97    pub fn out_invert(&mut self) -> OUT_INVERT_W<CARRIER_CFG_SPEC> {
98        OUT_INVERT_W::new(self, 12)
99    }
100    #[doc = "Bit 13"]
101    #[inline(always)]
102    pub fn in_invert(&mut self) -> IN_INVERT_W<CARRIER_CFG_SPEC> {
103        IN_INVERT_W::new(self, 13)
104    }
105}
106#[doc = "Carrier enable and configuratoin\n\nYou can [`read`](crate::Reg::read) this register and get [`carrier_cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`carrier_cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
107pub struct CARRIER_CFG_SPEC;
108impl crate::RegisterSpec for CARRIER_CFG_SPEC {
109    type Ux = u32;
110}
111#[doc = "`read()` method returns [`carrier_cfg::R`](R) reader structure"]
112impl crate::Readable for CARRIER_CFG_SPEC {}
113#[doc = "`write(|w| ..)` method takes [`carrier_cfg::W`](W) writer structure"]
114impl crate::Writable for CARRIER_CFG_SPEC {
115    type Safety = crate::Unsafe;
116    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
117    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
118}
119#[doc = "`reset()` method sets CARRIER_CFG to value 0"]
120impl crate::Resettable for CARRIER_CFG_SPEC {
121    const RESET_VALUE: u32 = 0;
122}
esp32/mcpwm0/ch/carrier_cfg.rs

esp32/mcpwm0/ch/
carrier_cfg.rs
