esp32/slc/
conf0.rs

1#[doc = "Register `CONF0` reader"]
2pub type R = crate::R<CONF0_SPEC>;
3#[doc = "Register `CONF0` writer"]
4pub type W = crate::W<CONF0_SPEC>;
5#[doc = "Field `SLC0_TX_RST` reader - "]
6pub type SLC0_TX_RST_R = crate::BitReader;
7#[doc = "Field `SLC0_TX_RST` writer - "]
8pub type SLC0_TX_RST_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `SLC0_RX_RST` reader - "]
10pub type SLC0_RX_RST_R = crate::BitReader;
11#[doc = "Field `SLC0_RX_RST` writer - "]
12pub type SLC0_RX_RST_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `AHBM_FIFO_RST` reader - "]
14pub type AHBM_FIFO_RST_R = crate::BitReader;
15#[doc = "Field `AHBM_FIFO_RST` writer - "]
16pub type AHBM_FIFO_RST_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `AHBM_RST` reader - "]
18pub type AHBM_RST_R = crate::BitReader;
19#[doc = "Field `AHBM_RST` writer - "]
20pub type AHBM_RST_W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `SLC0_TX_LOOP_TEST` reader - "]
22pub type SLC0_TX_LOOP_TEST_R = crate::BitReader;
23#[doc = "Field `SLC0_TX_LOOP_TEST` writer - "]
24pub type SLC0_TX_LOOP_TEST_W<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `SLC0_RX_LOOP_TEST` reader - "]
26pub type SLC0_RX_LOOP_TEST_R = crate::BitReader;
27#[doc = "Field `SLC0_RX_LOOP_TEST` writer - "]
28pub type SLC0_RX_LOOP_TEST_W<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `SLC0_RX_AUTO_WRBACK` reader - "]
30pub type SLC0_RX_AUTO_WRBACK_R = crate::BitReader;
31#[doc = "Field `SLC0_RX_AUTO_WRBACK` writer - "]
32pub type SLC0_RX_AUTO_WRBACK_W<'a, REG> = crate::BitWriter<'a, REG>;
33#[doc = "Field `SLC0_RX_NO_RESTART_CLR` reader - "]
34pub type SLC0_RX_NO_RESTART_CLR_R = crate::BitReader;
35#[doc = "Field `SLC0_RX_NO_RESTART_CLR` writer - "]
36pub type SLC0_RX_NO_RESTART_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
37#[doc = "Field `SLC0_RXDSCR_BURST_EN` reader - "]
38pub type SLC0_RXDSCR_BURST_EN_R = crate::BitReader;
39#[doc = "Field `SLC0_RXDSCR_BURST_EN` writer - "]
40pub type SLC0_RXDSCR_BURST_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
41#[doc = "Field `SLC0_RXDATA_BURST_EN` reader - "]
42pub type SLC0_RXDATA_BURST_EN_R = crate::BitReader;
43#[doc = "Field `SLC0_RXDATA_BURST_EN` writer - "]
44pub type SLC0_RXDATA_BURST_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
45#[doc = "Field `SLC0_RXLINK_AUTO_RET` reader - "]
46pub type SLC0_RXLINK_AUTO_RET_R = crate::BitReader;
47#[doc = "Field `SLC0_RXLINK_AUTO_RET` writer - "]
48pub type SLC0_RXLINK_AUTO_RET_W<'a, REG> = crate::BitWriter<'a, REG>;
49#[doc = "Field `SLC0_TXLINK_AUTO_RET` reader - "]
50pub type SLC0_TXLINK_AUTO_RET_R = crate::BitReader;
51#[doc = "Field `SLC0_TXLINK_AUTO_RET` writer - "]
52pub type SLC0_TXLINK_AUTO_RET_W<'a, REG> = crate::BitWriter<'a, REG>;
53#[doc = "Field `SLC0_TXDSCR_BURST_EN` reader - "]
54pub type SLC0_TXDSCR_BURST_EN_R = crate::BitReader;
55#[doc = "Field `SLC0_TXDSCR_BURST_EN` writer - "]
56pub type SLC0_TXDSCR_BURST_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
57#[doc = "Field `SLC0_TXDATA_BURST_EN` reader - "]
58pub type SLC0_TXDATA_BURST_EN_R = crate::BitReader;
59#[doc = "Field `SLC0_TXDATA_BURST_EN` writer - "]
60pub type SLC0_TXDATA_BURST_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
61#[doc = "Field `SLC0_TOKEN_AUTO_CLR` reader - "]
62pub type SLC0_TOKEN_AUTO_CLR_R = crate::BitReader;
63#[doc = "Field `SLC0_TOKEN_AUTO_CLR` writer - "]
64pub type SLC0_TOKEN_AUTO_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
65#[doc = "Field `SLC0_TOKEN_SEL` reader - "]
66pub type SLC0_TOKEN_SEL_R = crate::BitReader;
67#[doc = "Field `SLC0_TOKEN_SEL` writer - "]
68pub type SLC0_TOKEN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>;
69#[doc = "Field `SLC1_TX_RST` reader - "]
70pub type SLC1_TX_RST_R = crate::BitReader;
71#[doc = "Field `SLC1_TX_RST` writer - "]
72pub type SLC1_TX_RST_W<'a, REG> = crate::BitWriter<'a, REG>;
73#[doc = "Field `SLC1_RX_RST` reader - "]
74pub type SLC1_RX_RST_R = crate::BitReader;
75#[doc = "Field `SLC1_RX_RST` writer - "]
76pub type SLC1_RX_RST_W<'a, REG> = crate::BitWriter<'a, REG>;
77#[doc = "Field `SLC0_WR_RETRY_MASK_EN` reader - "]
78pub type SLC0_WR_RETRY_MASK_EN_R = crate::BitReader;
79#[doc = "Field `SLC0_WR_RETRY_MASK_EN` writer - "]
80pub type SLC0_WR_RETRY_MASK_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
81#[doc = "Field `SLC1_WR_RETRY_MASK_EN` reader - "]
82pub type SLC1_WR_RETRY_MASK_EN_R = crate::BitReader;
83#[doc = "Field `SLC1_WR_RETRY_MASK_EN` writer - "]
84pub type SLC1_WR_RETRY_MASK_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
85#[doc = "Field `SLC1_TX_LOOP_TEST` reader - "]
86pub type SLC1_TX_LOOP_TEST_R = crate::BitReader;
87#[doc = "Field `SLC1_TX_LOOP_TEST` writer - "]
88pub type SLC1_TX_LOOP_TEST_W<'a, REG> = crate::BitWriter<'a, REG>;
89#[doc = "Field `SLC1_RX_LOOP_TEST` reader - "]
90pub type SLC1_RX_LOOP_TEST_R = crate::BitReader;
91#[doc = "Field `SLC1_RX_LOOP_TEST` writer - "]
92pub type SLC1_RX_LOOP_TEST_W<'a, REG> = crate::BitWriter<'a, REG>;
93#[doc = "Field `SLC1_RX_AUTO_WRBACK` reader - "]
94pub type SLC1_RX_AUTO_WRBACK_R = crate::BitReader;
95#[doc = "Field `SLC1_RX_AUTO_WRBACK` writer - "]
96pub type SLC1_RX_AUTO_WRBACK_W<'a, REG> = crate::BitWriter<'a, REG>;
97#[doc = "Field `SLC1_RX_NO_RESTART_CLR` reader - "]
98pub type SLC1_RX_NO_RESTART_CLR_R = crate::BitReader;
99#[doc = "Field `SLC1_RX_NO_RESTART_CLR` writer - "]
100pub type SLC1_RX_NO_RESTART_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
101#[doc = "Field `SLC1_RXDSCR_BURST_EN` reader - "]
102pub type SLC1_RXDSCR_BURST_EN_R = crate::BitReader;
103#[doc = "Field `SLC1_RXDSCR_BURST_EN` writer - "]
104pub type SLC1_RXDSCR_BURST_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
105#[doc = "Field `SLC1_RXDATA_BURST_EN` reader - "]
106pub type SLC1_RXDATA_BURST_EN_R = crate::BitReader;
107#[doc = "Field `SLC1_RXDATA_BURST_EN` writer - "]
108pub type SLC1_RXDATA_BURST_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
109#[doc = "Field `SLC1_RXLINK_AUTO_RET` reader - "]
110pub type SLC1_RXLINK_AUTO_RET_R = crate::BitReader;
111#[doc = "Field `SLC1_RXLINK_AUTO_RET` writer - "]
112pub type SLC1_RXLINK_AUTO_RET_W<'a, REG> = crate::BitWriter<'a, REG>;
113#[doc = "Field `SLC1_TXLINK_AUTO_RET` reader - "]
114pub type SLC1_TXLINK_AUTO_RET_R = crate::BitReader;
115#[doc = "Field `SLC1_TXLINK_AUTO_RET` writer - "]
116pub type SLC1_TXLINK_AUTO_RET_W<'a, REG> = crate::BitWriter<'a, REG>;
117#[doc = "Field `SLC1_TXDSCR_BURST_EN` reader - "]
118pub type SLC1_TXDSCR_BURST_EN_R = crate::BitReader;
119#[doc = "Field `SLC1_TXDSCR_BURST_EN` writer - "]
120pub type SLC1_TXDSCR_BURST_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
121#[doc = "Field `SLC1_TXDATA_BURST_EN` reader - "]
122pub type SLC1_TXDATA_BURST_EN_R = crate::BitReader;
123#[doc = "Field `SLC1_TXDATA_BURST_EN` writer - "]
124pub type SLC1_TXDATA_BURST_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
125#[doc = "Field `SLC1_TOKEN_AUTO_CLR` reader - "]
126pub type SLC1_TOKEN_AUTO_CLR_R = crate::BitReader;
127#[doc = "Field `SLC1_TOKEN_AUTO_CLR` writer - "]
128pub type SLC1_TOKEN_AUTO_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
129#[doc = "Field `SLC1_TOKEN_SEL` reader - "]
130pub type SLC1_TOKEN_SEL_R = crate::BitReader;
131#[doc = "Field `SLC1_TOKEN_SEL` writer - "]
132pub type SLC1_TOKEN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>;
133impl R {
134    #[doc = "Bit 0"]
135    #[inline(always)]
136    pub fn slc0_tx_rst(&self) -> SLC0_TX_RST_R {
137        SLC0_TX_RST_R::new((self.bits & 1) != 0)
138    }
139    #[doc = "Bit 1"]
140    #[inline(always)]
141    pub fn slc0_rx_rst(&self) -> SLC0_RX_RST_R {
142        SLC0_RX_RST_R::new(((self.bits >> 1) & 1) != 0)
143    }
144    #[doc = "Bit 2"]
145    #[inline(always)]
146    pub fn ahbm_fifo_rst(&self) -> AHBM_FIFO_RST_R {
147        AHBM_FIFO_RST_R::new(((self.bits >> 2) & 1) != 0)
148    }
149    #[doc = "Bit 3"]
150    #[inline(always)]
151    pub fn ahbm_rst(&self) -> AHBM_RST_R {
152        AHBM_RST_R::new(((self.bits >> 3) & 1) != 0)
153    }
154    #[doc = "Bit 4"]
155    #[inline(always)]
156    pub fn slc0_tx_loop_test(&self) -> SLC0_TX_LOOP_TEST_R {
157        SLC0_TX_LOOP_TEST_R::new(((self.bits >> 4) & 1) != 0)
158    }
159    #[doc = "Bit 5"]
160    #[inline(always)]
161    pub fn slc0_rx_loop_test(&self) -> SLC0_RX_LOOP_TEST_R {
162        SLC0_RX_LOOP_TEST_R::new(((self.bits >> 5) & 1) != 0)
163    }
164    #[doc = "Bit 6"]
165    #[inline(always)]
166    pub fn slc0_rx_auto_wrback(&self) -> SLC0_RX_AUTO_WRBACK_R {
167        SLC0_RX_AUTO_WRBACK_R::new(((self.bits >> 6) & 1) != 0)
168    }
169    #[doc = "Bit 7"]
170    #[inline(always)]
171    pub fn slc0_rx_no_restart_clr(&self) -> SLC0_RX_NO_RESTART_CLR_R {
172        SLC0_RX_NO_RESTART_CLR_R::new(((self.bits >> 7) & 1) != 0)
173    }
174    #[doc = "Bit 8"]
175    #[inline(always)]
176    pub fn slc0_rxdscr_burst_en(&self) -> SLC0_RXDSCR_BURST_EN_R {
177        SLC0_RXDSCR_BURST_EN_R::new(((self.bits >> 8) & 1) != 0)
178    }
179    #[doc = "Bit 9"]
180    #[inline(always)]
181    pub fn slc0_rxdata_burst_en(&self) -> SLC0_RXDATA_BURST_EN_R {
182        SLC0_RXDATA_BURST_EN_R::new(((self.bits >> 9) & 1) != 0)
183    }
184    #[doc = "Bit 10"]
185    #[inline(always)]
186    pub fn slc0_rxlink_auto_ret(&self) -> SLC0_RXLINK_AUTO_RET_R {
187        SLC0_RXLINK_AUTO_RET_R::new(((self.bits >> 10) & 1) != 0)
188    }
189    #[doc = "Bit 11"]
190    #[inline(always)]
191    pub fn slc0_txlink_auto_ret(&self) -> SLC0_TXLINK_AUTO_RET_R {
192        SLC0_TXLINK_AUTO_RET_R::new(((self.bits >> 11) & 1) != 0)
193    }
194    #[doc = "Bit 12"]
195    #[inline(always)]
196    pub fn slc0_txdscr_burst_en(&self) -> SLC0_TXDSCR_BURST_EN_R {
197        SLC0_TXDSCR_BURST_EN_R::new(((self.bits >> 12) & 1) != 0)
198    }
199    #[doc = "Bit 13"]
200    #[inline(always)]
201    pub fn slc0_txdata_burst_en(&self) -> SLC0_TXDATA_BURST_EN_R {
202        SLC0_TXDATA_BURST_EN_R::new(((self.bits >> 13) & 1) != 0)
203    }
204    #[doc = "Bit 14"]
205    #[inline(always)]
206    pub fn slc0_token_auto_clr(&self) -> SLC0_TOKEN_AUTO_CLR_R {
207        SLC0_TOKEN_AUTO_CLR_R::new(((self.bits >> 14) & 1) != 0)
208    }
209    #[doc = "Bit 15"]
210    #[inline(always)]
211    pub fn slc0_token_sel(&self) -> SLC0_TOKEN_SEL_R {
212        SLC0_TOKEN_SEL_R::new(((self.bits >> 15) & 1) != 0)
213    }
214    #[doc = "Bit 16"]
215    #[inline(always)]
216    pub fn slc1_tx_rst(&self) -> SLC1_TX_RST_R {
217        SLC1_TX_RST_R::new(((self.bits >> 16) & 1) != 0)
218    }
219    #[doc = "Bit 17"]
220    #[inline(always)]
221    pub fn slc1_rx_rst(&self) -> SLC1_RX_RST_R {
222        SLC1_RX_RST_R::new(((self.bits >> 17) & 1) != 0)
223    }
224    #[doc = "Bit 18"]
225    #[inline(always)]
226    pub fn slc0_wr_retry_mask_en(&self) -> SLC0_WR_RETRY_MASK_EN_R {
227        SLC0_WR_RETRY_MASK_EN_R::new(((self.bits >> 18) & 1) != 0)
228    }
229    #[doc = "Bit 19"]
230    #[inline(always)]
231    pub fn slc1_wr_retry_mask_en(&self) -> SLC1_WR_RETRY_MASK_EN_R {
232        SLC1_WR_RETRY_MASK_EN_R::new(((self.bits >> 19) & 1) != 0)
233    }
234    #[doc = "Bit 20"]
235    #[inline(always)]
236    pub fn slc1_tx_loop_test(&self) -> SLC1_TX_LOOP_TEST_R {
237        SLC1_TX_LOOP_TEST_R::new(((self.bits >> 20) & 1) != 0)
238    }
239    #[doc = "Bit 21"]
240    #[inline(always)]
241    pub fn slc1_rx_loop_test(&self) -> SLC1_RX_LOOP_TEST_R {
242        SLC1_RX_LOOP_TEST_R::new(((self.bits >> 21) & 1) != 0)
243    }
244    #[doc = "Bit 22"]
245    #[inline(always)]
246    pub fn slc1_rx_auto_wrback(&self) -> SLC1_RX_AUTO_WRBACK_R {
247        SLC1_RX_AUTO_WRBACK_R::new(((self.bits >> 22) & 1) != 0)
248    }
249    #[doc = "Bit 23"]
250    #[inline(always)]
251    pub fn slc1_rx_no_restart_clr(&self) -> SLC1_RX_NO_RESTART_CLR_R {
252        SLC1_RX_NO_RESTART_CLR_R::new(((self.bits >> 23) & 1) != 0)
253    }
254    #[doc = "Bit 24"]
255    #[inline(always)]
256    pub fn slc1_rxdscr_burst_en(&self) -> SLC1_RXDSCR_BURST_EN_R {
257        SLC1_RXDSCR_BURST_EN_R::new(((self.bits >> 24) & 1) != 0)
258    }
259    #[doc = "Bit 25"]
260    #[inline(always)]
261    pub fn slc1_rxdata_burst_en(&self) -> SLC1_RXDATA_BURST_EN_R {
262        SLC1_RXDATA_BURST_EN_R::new(((self.bits >> 25) & 1) != 0)
263    }
264    #[doc = "Bit 26"]
265    #[inline(always)]
266    pub fn slc1_rxlink_auto_ret(&self) -> SLC1_RXLINK_AUTO_RET_R {
267        SLC1_RXLINK_AUTO_RET_R::new(((self.bits >> 26) & 1) != 0)
268    }
269    #[doc = "Bit 27"]
270    #[inline(always)]
271    pub fn slc1_txlink_auto_ret(&self) -> SLC1_TXLINK_AUTO_RET_R {
272        SLC1_TXLINK_AUTO_RET_R::new(((self.bits >> 27) & 1) != 0)
273    }
274    #[doc = "Bit 28"]
275    #[inline(always)]
276    pub fn slc1_txdscr_burst_en(&self) -> SLC1_TXDSCR_BURST_EN_R {
277        SLC1_TXDSCR_BURST_EN_R::new(((self.bits >> 28) & 1) != 0)
278    }
279    #[doc = "Bit 29"]
280    #[inline(always)]
281    pub fn slc1_txdata_burst_en(&self) -> SLC1_TXDATA_BURST_EN_R {
282        SLC1_TXDATA_BURST_EN_R::new(((self.bits >> 29) & 1) != 0)
283    }
284    #[doc = "Bit 30"]
285    #[inline(always)]
286    pub fn slc1_token_auto_clr(&self) -> SLC1_TOKEN_AUTO_CLR_R {
287        SLC1_TOKEN_AUTO_CLR_R::new(((self.bits >> 30) & 1) != 0)
288    }
289    #[doc = "Bit 31"]
290    #[inline(always)]
291    pub fn slc1_token_sel(&self) -> SLC1_TOKEN_SEL_R {
292        SLC1_TOKEN_SEL_R::new(((self.bits >> 31) & 1) != 0)
293    }
294}
295#[cfg(feature = "impl-register-debug")]
296impl core::fmt::Debug for R {
297    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
298        f.debug_struct("CONF0")
299            .field("slc0_tx_rst", &self.slc0_tx_rst())
300            .field("slc0_rx_rst", &self.slc0_rx_rst())
301            .field("ahbm_fifo_rst", &self.ahbm_fifo_rst())
302            .field("ahbm_rst", &self.ahbm_rst())
303            .field("slc0_tx_loop_test", &self.slc0_tx_loop_test())
304            .field("slc0_rx_loop_test", &self.slc0_rx_loop_test())
305            .field("slc0_rx_auto_wrback", &self.slc0_rx_auto_wrback())
306            .field("slc0_rx_no_restart_clr", &self.slc0_rx_no_restart_clr())
307            .field("slc0_rxdscr_burst_en", &self.slc0_rxdscr_burst_en())
308            .field("slc0_rxdata_burst_en", &self.slc0_rxdata_burst_en())
309            .field("slc0_rxlink_auto_ret", &self.slc0_rxlink_auto_ret())
310            .field("slc0_txlink_auto_ret", &self.slc0_txlink_auto_ret())
311            .field("slc0_txdscr_burst_en", &self.slc0_txdscr_burst_en())
312            .field("slc0_txdata_burst_en", &self.slc0_txdata_burst_en())
313            .field("slc0_token_auto_clr", &self.slc0_token_auto_clr())
314            .field("slc0_token_sel", &self.slc0_token_sel())
315            .field("slc1_tx_rst", &self.slc1_tx_rst())
316            .field("slc1_rx_rst", &self.slc1_rx_rst())
317            .field("slc0_wr_retry_mask_en", &self.slc0_wr_retry_mask_en())
318            .field("slc1_wr_retry_mask_en", &self.slc1_wr_retry_mask_en())
319            .field("slc1_tx_loop_test", &self.slc1_tx_loop_test())
320            .field("slc1_rx_loop_test", &self.slc1_rx_loop_test())
321            .field("slc1_rx_auto_wrback", &self.slc1_rx_auto_wrback())
322            .field("slc1_rx_no_restart_clr", &self.slc1_rx_no_restart_clr())
323            .field("slc1_rxdscr_burst_en", &self.slc1_rxdscr_burst_en())
324            .field("slc1_rxdata_burst_en", &self.slc1_rxdata_burst_en())
325            .field("slc1_rxlink_auto_ret", &self.slc1_rxlink_auto_ret())
326            .field("slc1_txlink_auto_ret", &self.slc1_txlink_auto_ret())
327            .field("slc1_txdscr_burst_en", &self.slc1_txdscr_burst_en())
328            .field("slc1_txdata_burst_en", &self.slc1_txdata_burst_en())
329            .field("slc1_token_auto_clr", &self.slc1_token_auto_clr())
330            .field("slc1_token_sel", &self.slc1_token_sel())
331            .finish()
332    }
333}
334impl W {
335    #[doc = "Bit 0"]
336    #[inline(always)]
337    pub fn slc0_tx_rst(&mut self) -> SLC0_TX_RST_W<CONF0_SPEC> {
338        SLC0_TX_RST_W::new(self, 0)
339    }
340    #[doc = "Bit 1"]
341    #[inline(always)]
342    pub fn slc0_rx_rst(&mut self) -> SLC0_RX_RST_W<CONF0_SPEC> {
343        SLC0_RX_RST_W::new(self, 1)
344    }
345    #[doc = "Bit 2"]
346    #[inline(always)]
347    pub fn ahbm_fifo_rst(&mut self) -> AHBM_FIFO_RST_W<CONF0_SPEC> {
348        AHBM_FIFO_RST_W::new(self, 2)
349    }
350    #[doc = "Bit 3"]
351    #[inline(always)]
352    pub fn ahbm_rst(&mut self) -> AHBM_RST_W<CONF0_SPEC> {
353        AHBM_RST_W::new(self, 3)
354    }
355    #[doc = "Bit 4"]
356    #[inline(always)]
357    pub fn slc0_tx_loop_test(&mut self) -> SLC0_TX_LOOP_TEST_W<CONF0_SPEC> {
358        SLC0_TX_LOOP_TEST_W::new(self, 4)
359    }
360    #[doc = "Bit 5"]
361    #[inline(always)]
362    pub fn slc0_rx_loop_test(&mut self) -> SLC0_RX_LOOP_TEST_W<CONF0_SPEC> {
363        SLC0_RX_LOOP_TEST_W::new(self, 5)
364    }
365    #[doc = "Bit 6"]
366    #[inline(always)]
367    pub fn slc0_rx_auto_wrback(&mut self) -> SLC0_RX_AUTO_WRBACK_W<CONF0_SPEC> {
368        SLC0_RX_AUTO_WRBACK_W::new(self, 6)
369    }
370    #[doc = "Bit 7"]
371    #[inline(always)]
372    pub fn slc0_rx_no_restart_clr(&mut self) -> SLC0_RX_NO_RESTART_CLR_W<CONF0_SPEC> {
373        SLC0_RX_NO_RESTART_CLR_W::new(self, 7)
374    }
375    #[doc = "Bit 8"]
376    #[inline(always)]
377    pub fn slc0_rxdscr_burst_en(&mut self) -> SLC0_RXDSCR_BURST_EN_W<CONF0_SPEC> {
378        SLC0_RXDSCR_BURST_EN_W::new(self, 8)
379    }
380    #[doc = "Bit 9"]
381    #[inline(always)]
382    pub fn slc0_rxdata_burst_en(&mut self) -> SLC0_RXDATA_BURST_EN_W<CONF0_SPEC> {
383        SLC0_RXDATA_BURST_EN_W::new(self, 9)
384    }
385    #[doc = "Bit 10"]
386    #[inline(always)]
387    pub fn slc0_rxlink_auto_ret(&mut self) -> SLC0_RXLINK_AUTO_RET_W<CONF0_SPEC> {
388        SLC0_RXLINK_AUTO_RET_W::new(self, 10)
389    }
390    #[doc = "Bit 11"]
391    #[inline(always)]
392    pub fn slc0_txlink_auto_ret(&mut self) -> SLC0_TXLINK_AUTO_RET_W<CONF0_SPEC> {
393        SLC0_TXLINK_AUTO_RET_W::new(self, 11)
394    }
395    #[doc = "Bit 12"]
396    #[inline(always)]
397    pub fn slc0_txdscr_burst_en(&mut self) -> SLC0_TXDSCR_BURST_EN_W<CONF0_SPEC> {
398        SLC0_TXDSCR_BURST_EN_W::new(self, 12)
399    }
400    #[doc = "Bit 13"]
401    #[inline(always)]
402    pub fn slc0_txdata_burst_en(&mut self) -> SLC0_TXDATA_BURST_EN_W<CONF0_SPEC> {
403        SLC0_TXDATA_BURST_EN_W::new(self, 13)
404    }
405    #[doc = "Bit 14"]
406    #[inline(always)]
407    pub fn slc0_token_auto_clr(&mut self) -> SLC0_TOKEN_AUTO_CLR_W<CONF0_SPEC> {
408        SLC0_TOKEN_AUTO_CLR_W::new(self, 14)
409    }
410    #[doc = "Bit 15"]
411    #[inline(always)]
412    pub fn slc0_token_sel(&mut self) -> SLC0_TOKEN_SEL_W<CONF0_SPEC> {
413        SLC0_TOKEN_SEL_W::new(self, 15)
414    }
415    #[doc = "Bit 16"]
416    #[inline(always)]
417    pub fn slc1_tx_rst(&mut self) -> SLC1_TX_RST_W<CONF0_SPEC> {
418        SLC1_TX_RST_W::new(self, 16)
419    }
420    #[doc = "Bit 17"]
421    #[inline(always)]
422    pub fn slc1_rx_rst(&mut self) -> SLC1_RX_RST_W<CONF0_SPEC> {
423        SLC1_RX_RST_W::new(self, 17)
424    }
425    #[doc = "Bit 18"]
426    #[inline(always)]
427    pub fn slc0_wr_retry_mask_en(&mut self) -> SLC0_WR_RETRY_MASK_EN_W<CONF0_SPEC> {
428        SLC0_WR_RETRY_MASK_EN_W::new(self, 18)
429    }
430    #[doc = "Bit 19"]
431    #[inline(always)]
432    pub fn slc1_wr_retry_mask_en(&mut self) -> SLC1_WR_RETRY_MASK_EN_W<CONF0_SPEC> {
433        SLC1_WR_RETRY_MASK_EN_W::new(self, 19)
434    }
435    #[doc = "Bit 20"]
436    #[inline(always)]
437    pub fn slc1_tx_loop_test(&mut self) -> SLC1_TX_LOOP_TEST_W<CONF0_SPEC> {
438        SLC1_TX_LOOP_TEST_W::new(self, 20)
439    }
440    #[doc = "Bit 21"]
441    #[inline(always)]
442    pub fn slc1_rx_loop_test(&mut self) -> SLC1_RX_LOOP_TEST_W<CONF0_SPEC> {
443        SLC1_RX_LOOP_TEST_W::new(self, 21)
444    }
445    #[doc = "Bit 22"]
446    #[inline(always)]
447    pub fn slc1_rx_auto_wrback(&mut self) -> SLC1_RX_AUTO_WRBACK_W<CONF0_SPEC> {
448        SLC1_RX_AUTO_WRBACK_W::new(self, 22)
449    }
450    #[doc = "Bit 23"]
451    #[inline(always)]
452    pub fn slc1_rx_no_restart_clr(&mut self) -> SLC1_RX_NO_RESTART_CLR_W<CONF0_SPEC> {
453        SLC1_RX_NO_RESTART_CLR_W::new(self, 23)
454    }
455    #[doc = "Bit 24"]
456    #[inline(always)]
457    pub fn slc1_rxdscr_burst_en(&mut self) -> SLC1_RXDSCR_BURST_EN_W<CONF0_SPEC> {
458        SLC1_RXDSCR_BURST_EN_W::new(self, 24)
459    }
460    #[doc = "Bit 25"]
461    #[inline(always)]
462    pub fn slc1_rxdata_burst_en(&mut self) -> SLC1_RXDATA_BURST_EN_W<CONF0_SPEC> {
463        SLC1_RXDATA_BURST_EN_W::new(self, 25)
464    }
465    #[doc = "Bit 26"]
466    #[inline(always)]
467    pub fn slc1_rxlink_auto_ret(&mut self) -> SLC1_RXLINK_AUTO_RET_W<CONF0_SPEC> {
468        SLC1_RXLINK_AUTO_RET_W::new(self, 26)
469    }
470    #[doc = "Bit 27"]
471    #[inline(always)]
472    pub fn slc1_txlink_auto_ret(&mut self) -> SLC1_TXLINK_AUTO_RET_W<CONF0_SPEC> {
473        SLC1_TXLINK_AUTO_RET_W::new(self, 27)
474    }
475    #[doc = "Bit 28"]
476    #[inline(always)]
477    pub fn slc1_txdscr_burst_en(&mut self) -> SLC1_TXDSCR_BURST_EN_W<CONF0_SPEC> {
478        SLC1_TXDSCR_BURST_EN_W::new(self, 28)
479    }
480    #[doc = "Bit 29"]
481    #[inline(always)]
482    pub fn slc1_txdata_burst_en(&mut self) -> SLC1_TXDATA_BURST_EN_W<CONF0_SPEC> {
483        SLC1_TXDATA_BURST_EN_W::new(self, 29)
484    }
485    #[doc = "Bit 30"]
486    #[inline(always)]
487    pub fn slc1_token_auto_clr(&mut self) -> SLC1_TOKEN_AUTO_CLR_W<CONF0_SPEC> {
488        SLC1_TOKEN_AUTO_CLR_W::new(self, 30)
489    }
490    #[doc = "Bit 31"]
491    #[inline(always)]
492    pub fn slc1_token_sel(&mut self) -> SLC1_TOKEN_SEL_W<CONF0_SPEC> {
493        SLC1_TOKEN_SEL_W::new(self, 31)
494    }
495}
496#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`conf0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`conf0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
497pub struct CONF0_SPEC;
498impl crate::RegisterSpec for CONF0_SPEC {
499    type Ux = u32;
500}
501#[doc = "`read()` method returns [`conf0::R`](R) reader structure"]
502impl crate::Readable for CONF0_SPEC {}
503#[doc = "`write(|w| ..)` method takes [`conf0::W`](W) writer structure"]
504impl crate::Writable for CONF0_SPEC {
505    type Safety = crate::Unsafe;
506    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
507    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
508}
509#[doc = "`reset()` method sets CONF0 to value 0xff3c_ff30"]
510impl crate::Resettable for CONF0_SPEC {
511    const RESET_VALUE: u32 = 0xff3c_ff30;
512}
esp32/slc/conf0.rs

esp32/slc/
conf0.rs
