esp32::uart0::int_raw

Type Alias R

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pub type R = R<INT_RAW_SPEC>;
Expand description

Register INT_RAW reader

Aliased Type§

struct R { /* private fields */ }

Implementations§

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impl R

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pub fn rxfifo_full(&self) -> RXFIFO_FULL_R

Bit 0 - This interrupt raw bit turns to high level when receiver receives more data than (rx_flow_thrhd_h3 rx_flow_thrhd).

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pub fn txfifo_empty(&self) -> TXFIFO_EMPTY_R

Bit 1 - This interrupt raw bit turns to high level when the amount of data in transmitter’s fifo is less than ((tx_mem_cnttxfifo_cnt) .

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pub fn parity_err(&self) -> PARITY_ERR_R

Bit 2 - This interrupt raw bit turns to high level when receiver detects the parity error of data.

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pub fn frm_err(&self) -> FRM_ERR_R

Bit 3 - This interrupt raw bit turns to high level when receiver detects data’s frame error .

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pub fn rxfifo_ovf(&self) -> RXFIFO_OVF_R

Bit 4 - This interrupt raw bit turns to high level when receiver receives more data than the fifo can store.

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pub fn dsr_chg(&self) -> DSR_CHG_R

Bit 5 - This interrupt raw bit turns to high level when receiver detects the edge change of dsrn signal.

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pub fn cts_chg(&self) -> CTS_CHG_R

Bit 6 - This interrupt raw bit turns to high level when receiver detects the edge change of ctsn signal.

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pub fn brk_det(&self) -> BRK_DET_R

Bit 7 - This interrupt raw bit turns to high level when receiver detects the 0 after the stop bit.

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pub fn rxfifo_tout(&self) -> RXFIFO_TOUT_R

Bit 8 - This interrupt raw bit turns to high level when receiver takes more time than rx_tout_thrhd to receive a byte.

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pub fn sw_xon(&self) -> SW_XON_R

Bit 9 - This interrupt raw bit turns to high level when receiver receives xoff char with uart_sw_flow_con_en is set to 1.

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pub fn sw_xoff(&self) -> SW_XOFF_R

Bit 10 - This interrupt raw bit turns to high level when receiver receives xon char with uart_sw_flow_con_en is set to 1.

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pub fn glitch_det(&self) -> GLITCH_DET_R

Bit 11 - This interrupt raw bit turns to high level when receiver detects the start bit.

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pub fn tx_brk_done(&self) -> TX_BRK_DONE_R

Bit 12 - This interrupt raw bit turns to high level when transmitter completes sendding 0 after all the datas in transmitter’s fifo are send.

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pub fn tx_brk_idle_done(&self) -> TX_BRK_IDLE_DONE_R

Bit 13 - This interrupt raw bit turns to high level when transmitter has kept the shortest duration after the last data has been send.

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pub fn tx_done(&self) -> TX_DONE_R

Bit 14 - This interrupt raw bit turns to high level when transmitter has send all the data in fifo.

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pub fn rs485_parity_err(&self) -> RS485_PARITY_ERR_R

Bit 15 - This interrupt raw bit turns to high level when rs485 detects the parity error.

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pub fn rs485_frm_err(&self) -> RS485_FRM_ERR_R

Bit 16 - This interrupt raw bit turns to high level when rs485 detects the data frame error.

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pub fn rs485_clash(&self) -> RS485_CLASH_R

Bit 17 - This interrupt raw bit turns to high level when rs485 detects the clash between transmitter and receiver.

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pub fn at_cmd_char_det(&self) -> AT_CMD_CHAR_DET_R

Bit 18 - This interrupt raw bit turns to high level when receiver detects the configured at_cmd chars.