Type Alias esp32::spi0::ctrl::R

pub type R = R<CTRL_SPEC>;

Register CTRL reader

Aliased Type

struct R { /* private fields */ }

Implementations

impl R

pub fn fcs_crc_en(&self) -> FCS_CRC_EN_R

Bit 10 - For SPI1 initialize crc32 module before writing encrypted data to flash. Active low.

pub fn tx_crc_en(&self) -> TX_CRC_EN_R

Bit 11 - For SPI1 enable crc32 when writing encrypted data to flash. 1: enable 0:disable

pub fn wait_flash_idle_en(&self) -> WAIT_FLASH_IDLE_EN_R

Bit 12 - wait flash idle when program flash or erase flash. 1: enable 0: disable.

pub fn fastrd_mode(&self) -> FASTRD_MODE_R

Bit 13 - This bit enable the bits: spi_fread_qio spi_fread_dio spi_fread_qout and spi_fread_dout. 1: enable 0: disable.

pub fn fread_dual(&self) -> FREAD_DUAL_R

Bit 14 - In the read operations read-data phase apply 2 signals. 1: enable 0: disable.

pub fn resandres(&self) -> RESANDRES_R

Bit 15 - The Device ID is read out to SPI_RD_STATUS register, this bit combine with spi_flash_res bit. 1: enable 0: disable.

pub fn fread_quad(&self) -> FREAD_QUAD_R

Bit 20 - In the read operations read-data phase apply 4 signals. 1: enable 0: disable.

pub fn wp(&self) -> WP_R

Bit 21 - Write protect signal output when SPI is idle. 1: output high 0: output low.

pub fn wrsr_2b(&self) -> WRSR_2B_R

Bit 22 - two bytes data will be written to status register when it is set. 1: enable 0: disable.

pub fn fread_dio(&self) -> FREAD_DIO_R

Bit 23 - In the read operations address phase and read-data phase apply 2 signals. 1: enable 0: disable.

pub fn fread_qio(&self) -> FREAD_QIO_R

Bit 24 - In the read operations address phase and read-data phase apply 4 signals. 1: enable 0: disable.

pub fn rd_bit_order(&self) -> RD_BIT_ORDER_R

Bit 25 - In read-data (MISO) phase 1: LSB first 0: MSB first

pub fn wr_bit_order(&self) -> WR_BIT_ORDER_R

Bit 26 - In command address write-data (MOSI) phases 1: LSB firs 0: MSB first