Struct esp32::mcpwm0::ch::CH

#[repr(C)]
pub struct CH { /* private fields */ }

Cluster CH%s, containing GEN?_STMP_CFG, GEN?_TSTMP_A, GEN?_TSTMP_B, GEN?_CFG0, GEN?_FORCE, GEN?_A, GEN?_B, DT?_CFG, DT?_FED_CFG, DT?_RED_CFG, CARRIER?_CFG, FH?_CFG0, FH?_CFG1, FH?_STATUS

Implementations

impl CH

pub const fn gen_stmp_cfg(&self) -> &GEN_STMP_CFG

0x00 - Transfer status and update method for time stamp registers A and B

pub const fn gen_tstmp_a(&self) -> &GEN_TSTMP_A

0x04 - Shadow register for register A.

pub const fn gen_tstmp_b(&self) -> &GEN_TSTMP_B

0x08 - Shadow register for register B.

pub const fn gen_cfg0(&self) -> &GEN_CFG0

0x0c -

pub const fn gen_force(&self) -> &GEN_FORCE

0x10 - Permissives to force PWMxA and PWMxB outputs by software

pub const fn gen(&self, n: usize) -> &GEN

0x14..0x1c - Actions triggered by events on PWMx%s

pub fn gen_iter(&self) -> impl Iterator<Item = &GEN>

Iterator for array of: 0x14..0x1c - Actions triggered by events on PWMx%s

pub const fn gena(&self) -> &GEN

0x14 - Actions triggered by events on PWMxA

pub const fn genb(&self) -> &GEN

0x18 - Actions triggered by events on PWMxB

pub const fn dt_cfg(&self) -> &DT_CFG

0x1c - Dead time type selection and configuration

pub const fn dt_fed_cfg(&self) -> &DT_FED_CFG

0x20 - Shadow register for falling edge delay (FED).

pub const fn dt_red_cfg(&self) -> &DT_RED_CFG

0x24 - Shadow register for rising edge delay (RED).

pub const fn carrier_cfg(&self) -> &CARRIER_CFG

0x28 - Carrier enable and configuratoin

pub const fn fh_cfg0(&self) -> &FH_CFG0

0x2c - Actions on PWM0A and PWM0B trip events

pub const fn fh_cfg1(&self) -> &FH_CFG1

0x30 - Software triggers for fault handler actions

pub const fn fh_status(&self) -> &FH_STATUS

0x34 - Status of fault events.