Module esp32::spi0::ctrl

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Structs§

Type Aliases§

  • Field FASTRD_MODE reader - This bit enable the bits: spi_fread_qio spi_fread_dio spi_fread_qout and spi_fread_dout. 1: enable 0: disable.
  • Field FASTRD_MODE writer - This bit enable the bits: spi_fread_qio spi_fread_dio spi_fread_qout and spi_fread_dout. 1: enable 0: disable.
  • Field FCS_CRC_EN reader - For SPI1 initialize crc32 module before writing encrypted data to flash. Active low.
  • Field FCS_CRC_EN writer - For SPI1 initialize crc32 module before writing encrypted data to flash. Active low.
  • Field FREAD_DIO reader - In the read operations address phase and read-data phase apply 2 signals. 1: enable 0: disable.
  • Field FREAD_DIO writer - In the read operations address phase and read-data phase apply 2 signals. 1: enable 0: disable.
  • Field FREAD_DUAL reader - In the read operations read-data phase apply 2 signals. 1: enable 0: disable.
  • Field FREAD_DUAL writer - In the read operations read-data phase apply 2 signals. 1: enable 0: disable.
  • Field FREAD_QIO reader - In the read operations address phase and read-data phase apply 4 signals. 1: enable 0: disable.
  • Field FREAD_QIO writer - In the read operations address phase and read-data phase apply 4 signals. 1: enable 0: disable.
  • Field FREAD_QUAD reader - In the read operations read-data phase apply 4 signals. 1: enable 0: disable.
  • Field FREAD_QUAD writer - In the read operations read-data phase apply 4 signals. 1: enable 0: disable.
  • Register CTRL reader
  • Field RD_BIT_ORDER reader - In read-data (MISO) phase 1: LSB first 0: MSB first
  • Field RD_BIT_ORDER writer - In read-data (MISO) phase 1: LSB first 0: MSB first
  • Field RESANDRES reader - The Device ID is read out to SPI_RD_STATUS register, this bit combine with spi_flash_res bit. 1: enable 0: disable.
  • Field RESANDRES writer - The Device ID is read out to SPI_RD_STATUS register, this bit combine with spi_flash_res bit. 1: enable 0: disable.
  • Field TX_CRC_EN reader - For SPI1 enable crc32 when writing encrypted data to flash. 1: enable 0:disable
  • Field TX_CRC_EN writer - For SPI1 enable crc32 when writing encrypted data to flash. 1: enable 0:disable
  • Register CTRL writer
  • Field WAIT_FLASH_IDLE_EN reader - wait flash idle when program flash or erase flash. 1: enable 0: disable.
  • Field WAIT_FLASH_IDLE_EN writer - wait flash idle when program flash or erase flash. 1: enable 0: disable.
  • Field WP reader - Write protect signal output when SPI is idle. 1: output high 0: output low.
  • Field WP writer - Write protect signal output when SPI is idle. 1: output high 0: output low.
  • Field WRSR_2B reader - two bytes data will be written to status register when it is set. 1: enable 0: disable.
  • Field WRSR_2B writer - two bytes data will be written to status register when it is set. 1: enable 0: disable.
  • Field WR_BIT_ORDER reader - In command address write-data (MOSI) phases 1: LSB firs 0: MSB first
  • Field WR_BIT_ORDER writer - In command address write-data (MOSI) phases 1: LSB firs 0: MSB first