Type Alias esp32::ledc::int_ena::W

pub type W = W<INT_ENA_SPEC>;

Register INT_ENA writer

Aliased Type

struct W { /* private fields */ }

Implementations

impl W

pub fn hstimer0_ovf_int_ena( &mut self ) -> HSTIMER0_OVF_INT_ENA_W<'_, INT_ENA_SPEC>

Bit 0 - The interrupt enable bit for high speed channel0 counter overflow interrupt.

pub fn hstimer1_ovf_int_ena( &mut self ) -> HSTIMER1_OVF_INT_ENA_W<'_, INT_ENA_SPEC>

Bit 1 - The interrupt enable bit for high speed channel1 counter overflow interrupt.

pub fn hstimer2_ovf_int_ena( &mut self ) -> HSTIMER2_OVF_INT_ENA_W<'_, INT_ENA_SPEC>

Bit 2 - The interrupt enable bit for high speed channel2 counter overflow interrupt.

pub fn hstimer3_ovf_int_ena( &mut self ) -> HSTIMER3_OVF_INT_ENA_W<'_, INT_ENA_SPEC>

Bit 3 - The interrupt enable bit for high speed channel3 counter overflow interrupt.

pub fn lstimer0_ovf_int_ena( &mut self ) -> LSTIMER0_OVF_INT_ENA_W<'_, INT_ENA_SPEC>

Bit 4 - The interrupt enable bit for low speed channel0 counter overflow interrupt.

pub fn lstimer1_ovf_int_ena( &mut self ) -> LSTIMER1_OVF_INT_ENA_W<'_, INT_ENA_SPEC>

Bit 5 - The interrupt enable bit for low speed channel1 counter overflow interrupt.

pub fn lstimer2_ovf_int_ena( &mut self ) -> LSTIMER2_OVF_INT_ENA_W<'_, INT_ENA_SPEC>

Bit 6 - The interrupt enable bit for low speed channel2 counter overflow interrupt.

pub fn lstimer3_ovf_int_ena( &mut self ) -> LSTIMER3_OVF_INT_ENA_W<'_, INT_ENA_SPEC>

Bit 7 - The interrupt enable bit for low speed channel3 counter overflow interrupt.

pub fn duty_chng_end_hsch0_int_ena( &mut self ) -> DUTY_CHNG_END_HSCH0_INT_ENA_W<'_, INT_ENA_SPEC>

Bit 8 - The interrupt enable bit for high speed channel 0 duty change done interrupt.

pub fn duty_chng_end_hsch1_int_ena( &mut self ) -> DUTY_CHNG_END_HSCH1_INT_ENA_W<'_, INT_ENA_SPEC>

Bit 9 - The interrupt enable bit for high speed channel 1 duty change done interrupt.

pub fn duty_chng_end_hsch2_int_ena( &mut self ) -> DUTY_CHNG_END_HSCH2_INT_ENA_W<'_, INT_ENA_SPEC>

Bit 10 - The interrupt enable bit for high speed channel 2 duty change done interrupt.

pub fn duty_chng_end_hsch3_int_ena( &mut self ) -> DUTY_CHNG_END_HSCH3_INT_ENA_W<'_, INT_ENA_SPEC>

Bit 11 - The interrupt enable bit for high speed channel 3 duty change done interrupt.

pub fn duty_chng_end_hsch4_int_ena( &mut self ) -> DUTY_CHNG_END_HSCH4_INT_ENA_W<'_, INT_ENA_SPEC>

Bit 12 - The interrupt enable bit for high speed channel 4 duty change done interrupt.

pub fn duty_chng_end_hsch5_int_ena( &mut self ) -> DUTY_CHNG_END_HSCH5_INT_ENA_W<'_, INT_ENA_SPEC>

Bit 13 - The interrupt enable bit for high speed channel 5 duty change done interrupt.

pub fn duty_chng_end_hsch6_int_ena( &mut self ) -> DUTY_CHNG_END_HSCH6_INT_ENA_W<'_, INT_ENA_SPEC>

Bit 14 - The interrupt enable bit for high speed channel 6 duty change done interrupt.

pub fn duty_chng_end_hsch7_int_ena( &mut self ) -> DUTY_CHNG_END_HSCH7_INT_ENA_W<'_, INT_ENA_SPEC>

Bit 15 - The interrupt enable bit for high speed channel 7 duty change done interrupt.

pub fn duty_chng_end_lsch0_int_ena( &mut self ) -> DUTY_CHNG_END_LSCH0_INT_ENA_W<'_, INT_ENA_SPEC>

Bit 16 - The interrupt enable bit for low speed channel 0 duty change done interrupt.

pub fn duty_chng_end_lsch1_int_ena( &mut self ) -> DUTY_CHNG_END_LSCH1_INT_ENA_W<'_, INT_ENA_SPEC>

Bit 17 - The interrupt enable bit for low speed channel 1 duty change done interrupt.

pub fn duty_chng_end_lsch2_int_ena( &mut self ) -> DUTY_CHNG_END_LSCH2_INT_ENA_W<'_, INT_ENA_SPEC>

Bit 18 - The interrupt enable bit for low speed channel 2 duty change done interrupt.

pub fn duty_chng_end_lsch3_int_ena( &mut self ) -> DUTY_CHNG_END_LSCH3_INT_ENA_W<'_, INT_ENA_SPEC>

Bit 19 - The interrupt enable bit for low speed channel 3 duty change done interrupt.

pub fn duty_chng_end_lsch4_int_ena( &mut self ) -> DUTY_CHNG_END_LSCH4_INT_ENA_W<'_, INT_ENA_SPEC>

Bit 20 - The interrupt enable bit for low speed channel 4 duty change done interrupt.

pub fn duty_chng_end_lsch5_int_ena( &mut self ) -> DUTY_CHNG_END_LSCH5_INT_ENA_W<'_, INT_ENA_SPEC>

Bit 21 - The interrupt enable bit for low speed channel 5 duty change done interrupt.

pub fn duty_chng_end_lsch6_int_ena( &mut self ) -> DUTY_CHNG_END_LSCH6_INT_ENA_W<'_, INT_ENA_SPEC>

Bit 22 - The interrupt enable bit for low speed channel 6 duty change done interrupt.

pub fn duty_chng_end_lsch7_int_ena( &mut self ) -> DUTY_CHNG_END_LSCH7_INT_ENA_W<'_, INT_ENA_SPEC>

Bit 23 - The interrupt enable bit for low speed channel 7 duty change done interrupt.

pub unsafe fn bits(&mut self, bits: u32) -> &mut Self

Writes raw bits to the register.

Safety

Passing incorrect value can cause undefined behaviour. See reference manual