Struct esp32::MCPWM0

pub struct MCPWM0 { /* private fields */ }

Motor Control Pulse-Width Modulation 0

Implementations

impl MCPWM0

pub const PTR: *const RegisterBlock = {0x3ff5e000 as *const mcpwm0::RegisterBlock}

Pointer to the register block

pub const fn ptr() -> *const RegisterBlock

Return the pointer to the register block

pub unsafe fn steal() -> Self

Steal an instance of this peripheral

Safety

Ensure that the new instance of the peripheral cannot be used in a way that may race with any existing instances, for example by only accessing read-only or write-only registers, or by consuming the original peripheral and using critical sections to coordinate access between multiple new instances.

Additionally, other software such as HALs may rely on only one peripheral instance existing to ensure memory safety; ensure no stolen instances are passed to such software.

Methods from Deref<Target = RegisterBlock>

pub fn clk_cfg(&self) -> &CLK_CFG

0x00 -

pub fn timer0_cfg0(&self) -> &TIMER0_CFG0

0x04 -

pub fn timer0_cfg1(&self) -> &TIMER0_CFG1

0x08 -

pub fn timer0_sync(&self) -> &TIMER0_SYNC

0x0c -

pub fn timer0_status(&self) -> &TIMER0_STATUS

0x10 -

pub fn timer1_cfg0(&self) -> &TIMER1_CFG0

0x14 -

pub fn timer1_cfg1(&self) -> &TIMER1_CFG1

0x18 -

pub fn timer1_sync(&self) -> &TIMER1_SYNC

0x1c -

pub fn timer1_status(&self) -> &TIMER1_STATUS

0x20 -

pub fn timer2_cfg0(&self) -> &TIMER2_CFG0

0x24 -

pub fn timer2_cfg1(&self) -> &TIMER2_CFG1

0x28 -

pub fn timer2_sync(&self) -> &TIMER2_SYNC

0x2c -

pub fn timer2_status(&self) -> &TIMER2_STATUS

0x30 -

pub fn timer_synci_cfg(&self) -> &TIMER_SYNCI_CFG

0x34 -

pub fn operator_timersel(&self) -> &OPERATOR_TIMERSEL

0x38 -

pub fn gen0_stmp_cfg(&self) -> &GEN0_STMP_CFG

0x3c -

pub fn gen0_tstmp_a(&self) -> &GEN0_TSTMP_A

0x40 -

pub fn gen0_tstmp_b(&self) -> &GEN0_TSTMP_B

0x44 -

pub fn gen0_cfg0(&self) -> &GEN0_CFG0

0x48 -

pub fn gen0_force(&self) -> &GEN0_FORCE

0x4c -

pub fn gen0_a(&self) -> &GEN0_A

0x50 -

pub fn gen0_b(&self) -> &GEN0_B

0x54 -

pub fn dt0_cfg(&self) -> &DT0_CFG

0x58 -

pub fn dt0_fed_cfg(&self) -> &DT0_FED_CFG

0x5c -

pub fn dt0_red_cfg(&self) -> &DT0_RED_CFG

0x60 -

pub fn carrier0_cfg(&self) -> &CARRIER0_CFG

0x64 -

pub fn fh0_cfg0(&self) -> &FH0_CFG0

0x68 -

pub fn fh0_cfg1(&self) -> &FH0_CFG1

0x6c -

pub fn fh0_status(&self) -> &FH0_STATUS

0x70 -

pub fn gen1_stmp_cfg(&self) -> &GEN1_STMP_CFG

0x74 -

pub fn gen1_tstmp_a(&self) -> &GEN1_TSTMP_A

0x78 -

pub fn gen1_tstmp_b(&self) -> &GEN1_TSTMP_B

0x7c -

pub fn gen1_cfg0(&self) -> &GEN1_CFG0

0x80 -

pub fn gen1_force(&self) -> &GEN1_FORCE

0x84 -

pub fn gen1_a(&self) -> &GEN1_A

0x88 -

pub fn gen1_b(&self) -> &GEN1_B

0x8c -

pub fn dt1_cfg(&self) -> &DT1_CFG

0x90 -

pub fn dt1_fed_cfg(&self) -> &DT1_FED_CFG

0x94 -

pub fn dt1_red_cfg(&self) -> &DT1_RED_CFG

0x98 -

pub fn carrier1_cfg(&self) -> &CARRIER1_CFG

0x9c -

pub fn fh1_cfg0(&self) -> &FH1_CFG0

0xa0 -

pub fn fh1_cfg1(&self) -> &FH1_CFG1

0xa4 -

pub fn fh1_status(&self) -> &FH1_STATUS

0xa8 -

pub fn gen2_stmp_cfg(&self) -> &GEN2_STMP_CFG

0xac -

pub fn gen2_tstmp_a(&self) -> &GEN2_TSTMP_A

0xb0 -

pub fn gen2_tstmp_b(&self) -> &GEN2_TSTMP_B

0xb4 -

pub fn gen2_cfg0(&self) -> &GEN2_CFG0

0xb8 -

pub fn gen2_force(&self) -> &GEN2_FORCE

0xbc -

pub fn gen2_a(&self) -> &GEN2_A

0xc0 -

pub fn gen2_b(&self) -> &GEN2_B

0xc4 -

pub fn dt2_cfg(&self) -> &DT2_CFG

0xc8 -

pub fn dt2_fed_cfg(&self) -> &DT2_FED_CFG

0xcc -

pub fn dt2_red_cfg(&self) -> &DT2_RED_CFG

0xd0 -

pub fn carrier2_cfg(&self) -> &CARRIER2_CFG

0xd4 -

pub fn fh2_cfg0(&self) -> &FH2_CFG0

0xd8 -

pub fn fh2_cfg1(&self) -> &FH2_CFG1

0xdc -

pub fn fh2_status(&self) -> &FH2_STATUS

0xe0 -

pub fn fault_detect(&self) -> &FAULT_DETECT

0xe4 -

pub fn cap_timer_cfg(&self) -> &CAP_TIMER_CFG

0xe8 -

pub fn cap_timer_phase(&self) -> &CAP_TIMER_PHASE

0xec -

pub fn cap_ch0_cfg(&self) -> &CAP_CH0_CFG

0xf0 -

pub fn cap_ch1_cfg(&self) -> &CAP_CH1_CFG

0xf4 -

pub fn cap_ch2_cfg(&self) -> &CAP_CH2_CFG

0xf8 -

pub fn cap_ch0(&self) -> &CAP_CH0

0xfc -

pub fn cap_ch1(&self) -> &CAP_CH1

0x100 -

pub fn cap_ch2(&self) -> &CAP_CH2

0x104 -

pub fn cap_status(&self) -> &CAP_STATUS

0x108 -

pub fn update_cfg(&self) -> &UPDATE_CFG

0x10c -

pub fn int_ena(&self) -> &INT_ENA

0x110 -

pub fn int_raw(&self) -> &INT_RAW

0x114 -

pub fn int_st(&self) -> &INT_ST

0x118 -

pub fn int_clr(&self) -> &INT_CLR

0x11c -

pub fn clk(&self) -> &CLK

0x120 -

pub fn version(&self) -> &VERSION

0x124 -

Trait Implementations

impl Debug for MCPWM0

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Deref for MCPWM0

type Target = RegisterBlock

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl Send for MCPWM0