Type Alias esp32::spi0::pin::R

pub type R = R<PIN_SPEC>;

Register PIN reader

Implementations

impl R

pub fn cs0_dis(&self) -> CS0_DIS_R

Bit 0 - SPI CS0 pin enable, 1: disable CS0, 0: spi_cs0 signal is from/to CS0 pin

pub fn cs1_dis(&self) -> CS1_DIS_R

Bit 1 - SPI CS1 pin enable, 1: disable CS1, 0: spi_cs1 signal is from/to CS1 pin

pub fn cs2_dis(&self) -> CS2_DIS_R

Bit 2 - SPI CS2 pin enable, 1: disable CS2, 0: spi_cs2 signal is from/to CS2 pin

pub fn ck_dis(&self) -> CK_DIS_R

Bit 5 - 1: spi clk out disable 0: spi clk out enable

pub fn master_cs_pol(&self) -> MASTER_CS_POL_R

Bits 6:8 - In the master mode the bits are the polarity of spi cs line the value is equivalent to spi_cs ^ spi_master_cs_pol.

pub fn master_ck_sel(&self) -> MASTER_CK_SEL_R

Bits 11:13 - In the master mode spi cs line is enable as spi clk it is combined with spi_cs0_dis spi_cs1_dis spi_cs2_dis.

pub fn ck_idle_edge(&self) -> CK_IDLE_EDGE_R

Bit 29 - 1: spi clk line is high when idle 0: spi clk line is low when idle

pub fn cs_keep_active(&self) -> CS_KEEP_ACTIVE_R

Bit 30 - spi cs line keep low when the bit is set.