Struct esp32::dport::RegisterBlock

source ·
#[repr(C)]
pub struct RegisterBlock {
Show 368 fields pub pro_boot_remap_ctrl: PRO_BOOT_REMAP_CTRL, pub app_boot_remap_ctrl: APP_BOOT_REMAP_CTRL, pub access_check: ACCESS_CHECK, pub pro_dport_apb_mask0: PRO_DPORT_APB_MASK0, pub pro_dport_apb_mask1: PRO_DPORT_APB_MASK1, pub app_dport_apb_mask0: APP_DPORT_APB_MASK0, pub app_dport_apb_mask1: APP_DPORT_APB_MASK1, pub peri_clk_en: PERI_CLK_EN, pub peri_rst_en: PERI_RST_EN, pub wifi_bb_cfg: WIFI_BB_CFG, pub wifi_bb_cfg_2: WIFI_BB_CFG_2, pub appcpu_ctrl_a: APPCPU_CTRL_A, pub appcpu_ctrl_b: APPCPU_CTRL_B, pub appcpu_ctrl_c: APPCPU_CTRL_C, pub appcpu_ctrl_d: APPCPU_CTRL_D, pub cpu_per_conf: CPU_PER_CONF, pub pro_cache_ctrl: PRO_CACHE_CTRL, pub pro_cache_ctrl1: PRO_CACHE_CTRL1, pub pro_cache_lock_0_addr: PRO_CACHE_LOCK_0_ADDR, pub pro_cache_lock_1_addr: PRO_CACHE_LOCK_1_ADDR, pub pro_cache_lock_2_addr: PRO_CACHE_LOCK_2_ADDR, pub pro_cache_lock_3_addr: PRO_CACHE_LOCK_3_ADDR, pub app_cache_ctrl: APP_CACHE_CTRL, pub app_cache_ctrl1: APP_CACHE_CTRL1, pub app_cache_lock_0_addr: APP_CACHE_LOCK_0_ADDR, pub app_cache_lock_1_addr: APP_CACHE_LOCK_1_ADDR, pub app_cache_lock_2_addr: APP_CACHE_LOCK_2_ADDR, pub app_cache_lock_3_addr: APP_CACHE_LOCK_3_ADDR, pub tracemem_mux_mode: TRACEMEM_MUX_MODE, pub pro_tracemem_ena: PRO_TRACEMEM_ENA, pub app_tracemem_ena: APP_TRACEMEM_ENA, pub cache_mux_mode: CACHE_MUX_MODE, pub immu_page_mode: IMMU_PAGE_MODE, pub dmmu_page_mode: DMMU_PAGE_MODE, pub rom_mpu_ena: ROM_MPU_ENA, pub mem_pd_mask: MEM_PD_MASK, pub rom_pd_ctrl: ROM_PD_CTRL, pub rom_fo_ctrl: ROM_FO_CTRL, pub sram_pd_ctrl_0: SRAM_PD_CTRL_0, pub sram_pd_ctrl_1: SRAM_PD_CTRL_1, pub sram_fo_ctrl_0: SRAM_FO_CTRL_0, pub sram_fo_ctrl_1: SRAM_FO_CTRL_1, pub iram_dram_ahb_sel: IRAM_DRAM_AHB_SEL, pub tag_fo_ctrl: TAG_FO_CTRL, pub ahb_lite_mask: AHB_LITE_MASK, pub ahb_mpu_table_0: AHB_MPU_TABLE_0, pub ahb_mpu_table_1: AHB_MPU_TABLE_1, pub host_inf_sel: HOST_INF_SEL, pub perip_clk_en: PERIP_CLK_EN, pub perip_rst_en: PERIP_RST_EN, pub slave_spi_config: SLAVE_SPI_CONFIG, pub wifi_clk_en: WIFI_CLK_EN, pub core_rst_en: CORE_RST_EN, pub bt_lpck_div_int: BT_LPCK_DIV_INT, pub bt_lpck_div_frac: BT_LPCK_DIV_FRAC, pub cpu_intr_from_cpu_0: CPU_INTR_FROM_CPU_0, pub cpu_intr_from_cpu_1: CPU_INTR_FROM_CPU_1, pub cpu_intr_from_cpu_2: CPU_INTR_FROM_CPU_2, pub cpu_intr_from_cpu_3: CPU_INTR_FROM_CPU_3, pub pro_intr_status_0: PRO_INTR_STATUS_0, pub pro_intr_status_1: PRO_INTR_STATUS_1, pub pro_intr_status_2: PRO_INTR_STATUS_2, pub app_intr_status_0: APP_INTR_STATUS_0, pub app_intr_status_1: APP_INTR_STATUS_1, pub app_intr_status_2: APP_INTR_STATUS_2, pub pro_mac_intr_map: PRO_MAC_INTR_MAP, pub pro_mac_nmi_map: PRO_MAC_NMI_MAP, pub pro_bb_int_map: PRO_BB_INT_MAP, pub pro_bt_mac_int_map: PRO_BT_MAC_INT_MAP, pub pro_bt_bb_int_map: PRO_BT_BB_INT_MAP, pub pro_bt_bb_nmi_map: PRO_BT_BB_NMI_MAP, pub pro_rwbt_irq_map: PRO_RWBT_IRQ_MAP, pub pro_rwble_irq_map: PRO_RWBLE_IRQ_MAP, pub pro_rwbt_nmi_map: PRO_RWBT_NMI_MAP, pub pro_rwble_nmi_map: PRO_RWBLE_NMI_MAP, pub pro_slc0_intr_map: PRO_SLC0_INTR_MAP, pub pro_slc1_intr_map: PRO_SLC1_INTR_MAP, pub pro_uhci0_intr_map: PRO_UHCI0_INTR_MAP, pub pro_uhci1_intr_map: PRO_UHCI1_INTR_MAP, pub pro_tg_t0_level_int_map: PRO_TG_T0_LEVEL_INT_MAP, pub pro_tg_t1_level_int_map: PRO_TG_T1_LEVEL_INT_MAP, pub pro_tg_wdt_level_int_map: PRO_TG_WDT_LEVEL_INT_MAP, pub pro_tg_lact_level_int_map: PRO_TG_LACT_LEVEL_INT_MAP, pub pro_tg1_t0_level_int_map: PRO_TG1_T0_LEVEL_INT_MAP, pub pro_tg1_t1_level_int_map: PRO_TG1_T1_LEVEL_INT_MAP, pub pro_tg1_wdt_level_int_map: PRO_TG1_WDT_LEVEL_INT_MAP, pub pro_tg1_lact_level_int_map: PRO_TG1_LACT_LEVEL_INT_MAP, pub pro_gpio_interrupt_map: PRO_GPIO_INTERRUPT_MAP, pub pro_gpio_interrupt_nmi_map: PRO_GPIO_INTERRUPT_NMI_MAP, pub pro_cpu_intr_from_cpu_0_map: PRO_CPU_INTR_FROM_CPU_0_MAP, pub pro_cpu_intr_from_cpu_1_map: PRO_CPU_INTR_FROM_CPU_1_MAP, pub pro_cpu_intr_from_cpu_2_map: PRO_CPU_INTR_FROM_CPU_2_MAP, pub pro_cpu_intr_from_cpu_3_map: PRO_CPU_INTR_FROM_CPU_3_MAP, pub pro_spi_intr_0_map: PRO_SPI_INTR_0_MAP, pub pro_spi_intr_1_map: PRO_SPI_INTR_1_MAP, pub pro_spi_intr_2_map: PRO_SPI_INTR_2_MAP, pub pro_spi_intr_3_map: PRO_SPI_INTR_3_MAP, pub pro_i2s0_int_map: PRO_I2S0_INT_MAP, pub pro_i2s1_int_map: PRO_I2S1_INT_MAP, pub pro_uart_intr_map: PRO_UART_INTR_MAP, pub pro_uart1_intr_map: PRO_UART1_INTR_MAP, pub pro_uart2_intr_map: PRO_UART2_INTR_MAP, pub pro_sdio_host_interrupt_map: PRO_SDIO_HOST_INTERRUPT_MAP, pub pro_emac_int_map: PRO_EMAC_INT_MAP, pub pro_pwm0_intr_map: PRO_PWM0_INTR_MAP, pub pro_pwm1_intr_map: PRO_PWM1_INTR_MAP, pub pro_pwm2_intr_map: PRO_PWM2_INTR_MAP, pub pro_pwm3_intr_map: PRO_PWM3_INTR_MAP, pub pro_ledc_int_map: PRO_LEDC_INT_MAP, pub pro_efuse_int_map: PRO_EFUSE_INT_MAP, pub pro_can_int_map: PRO_CAN_INT_MAP, pub pro_rtc_core_intr_map: PRO_RTC_CORE_INTR_MAP, pub pro_rmt_intr_map: PRO_RMT_INTR_MAP, pub pro_pcnt_intr_map: PRO_PCNT_INTR_MAP, pub pro_i2c_ext0_intr_map: PRO_I2C_EXT0_INTR_MAP, pub pro_i2c_ext1_intr_map: PRO_I2C_EXT1_INTR_MAP, pub pro_rsa_intr_map: PRO_RSA_INTR_MAP, pub pro_spi1_dma_int_map: PRO_SPI1_DMA_INT_MAP, pub pro_spi2_dma_int_map: PRO_SPI2_DMA_INT_MAP, pub pro_spi3_dma_int_map: PRO_SPI3_DMA_INT_MAP, pub pro_wdg_int_map: PRO_WDG_INT_MAP, pub pro_timer_int1_map: PRO_TIMER_INT1_MAP, pub pro_timer_int2_map: PRO_TIMER_INT2_MAP, pub pro_tg_t0_edge_int_map: PRO_TG_T0_EDGE_INT_MAP, pub pro_tg_t1_edge_int_map: PRO_TG_T1_EDGE_INT_MAP, pub pro_tg_wdt_edge_int_map: PRO_TG_WDT_EDGE_INT_MAP, pub pro_tg_lact_edge_int_map: PRO_TG_LACT_EDGE_INT_MAP, pub pro_tg1_t0_edge_int_map: PRO_TG1_T0_EDGE_INT_MAP, pub pro_tg1_t1_edge_int_map: PRO_TG1_T1_EDGE_INT_MAP, pub pro_tg1_wdt_edge_int_map: PRO_TG1_WDT_EDGE_INT_MAP, pub pro_tg1_lact_edge_int_map: PRO_TG1_LACT_EDGE_INT_MAP, pub pro_mmu_ia_int_map: PRO_MMU_IA_INT_MAP, pub pro_mpu_ia_int_map: PRO_MPU_IA_INT_MAP, pub pro_cache_ia_int_map: PRO_CACHE_IA_INT_MAP, pub app_mac_intr_map: APP_MAC_INTR_MAP, pub app_mac_nmi_map: APP_MAC_NMI_MAP, pub app_bb_int_map: APP_BB_INT_MAP, pub app_bt_mac_int_map: APP_BT_MAC_INT_MAP, pub app_bt_bb_int_map: APP_BT_BB_INT_MAP, pub app_bt_bb_nmi_map: APP_BT_BB_NMI_MAP, pub app_rwbt_irq_map: APP_RWBT_IRQ_MAP, pub app_rwble_irq_map: APP_RWBLE_IRQ_MAP, pub app_rwbt_nmi_map: APP_RWBT_NMI_MAP, pub app_rwble_nmi_map: APP_RWBLE_NMI_MAP, pub app_slc0_intr_map: APP_SLC0_INTR_MAP, pub app_slc1_intr_map: APP_SLC1_INTR_MAP, pub app_uhci0_intr_map: APP_UHCI0_INTR_MAP, pub app_uhci1_intr_map: APP_UHCI1_INTR_MAP, pub app_tg_t0_level_int_map: APP_TG_T0_LEVEL_INT_MAP, pub app_tg_t1_level_int_map: APP_TG_T1_LEVEL_INT_MAP, pub app_tg_wdt_level_int_map: APP_TG_WDT_LEVEL_INT_MAP, pub app_tg_lact_level_int_map: APP_TG_LACT_LEVEL_INT_MAP, pub app_tg1_t0_level_int_map: APP_TG1_T0_LEVEL_INT_MAP, pub app_tg1_t1_level_int_map: APP_TG1_T1_LEVEL_INT_MAP, pub app_tg1_wdt_level_int_map: APP_TG1_WDT_LEVEL_INT_MAP, pub app_tg1_lact_level_int_map: APP_TG1_LACT_LEVEL_INT_MAP, pub app_gpio_interrupt_map: APP_GPIO_INTERRUPT_MAP, pub app_gpio_interrupt_nmi_map: APP_GPIO_INTERRUPT_NMI_MAP, pub app_cpu_intr_from_cpu_0_map: APP_CPU_INTR_FROM_CPU_0_MAP, pub app_cpu_intr_from_cpu_1_map: APP_CPU_INTR_FROM_CPU_1_MAP, pub app_cpu_intr_from_cpu_2_map: APP_CPU_INTR_FROM_CPU_2_MAP, pub app_cpu_intr_from_cpu_3_map: APP_CPU_INTR_FROM_CPU_3_MAP, pub app_spi_intr_0_map: APP_SPI_INTR_0_MAP, pub app_spi_intr_1_map: APP_SPI_INTR_1_MAP, pub app_spi_intr_2_map: APP_SPI_INTR_2_MAP, pub app_spi_intr_3_map: APP_SPI_INTR_3_MAP, pub app_i2s0_int_map: APP_I2S0_INT_MAP, pub app_i2s1_int_map: APP_I2S1_INT_MAP, pub app_uart_intr_map: APP_UART_INTR_MAP, pub app_uart1_intr_map: APP_UART1_INTR_MAP, pub app_uart2_intr_map: APP_UART2_INTR_MAP, pub app_sdio_host_interrupt_map: APP_SDIO_HOST_INTERRUPT_MAP, pub app_emac_int_map: APP_EMAC_INT_MAP, pub app_pwm0_intr_map: APP_PWM0_INTR_MAP, pub app_pwm1_intr_map: APP_PWM1_INTR_MAP, pub app_pwm2_intr_map: APP_PWM2_INTR_MAP, pub app_pwm3_intr_map: APP_PWM3_INTR_MAP, pub app_ledc_int_map: APP_LEDC_INT_MAP, pub app_efuse_int_map: APP_EFUSE_INT_MAP, pub app_can_int_map: APP_CAN_INT_MAP, pub app_rtc_core_intr_map: APP_RTC_CORE_INTR_MAP, pub app_rmt_intr_map: APP_RMT_INTR_MAP, pub app_pcnt_intr_map: APP_PCNT_INTR_MAP, pub app_i2c_ext0_intr_map: APP_I2C_EXT0_INTR_MAP, pub app_i2c_ext1_intr_map: APP_I2C_EXT1_INTR_MAP, pub app_rsa_intr_map: APP_RSA_INTR_MAP, pub app_spi1_dma_int_map: APP_SPI1_DMA_INT_MAP, pub app_spi2_dma_int_map: APP_SPI2_DMA_INT_MAP, pub app_spi3_dma_int_map: APP_SPI3_DMA_INT_MAP, pub app_wdg_int_map: APP_WDG_INT_MAP, pub app_timer_int1_map: APP_TIMER_INT1_MAP, pub app_timer_int2_map: APP_TIMER_INT2_MAP, pub app_tg_t0_edge_int_map: APP_TG_T0_EDGE_INT_MAP, pub app_tg_t1_edge_int_map: APP_TG_T1_EDGE_INT_MAP, pub app_tg_wdt_edge_int_map: APP_TG_WDT_EDGE_INT_MAP, pub app_tg_lact_edge_int_map: APP_TG_LACT_EDGE_INT_MAP, pub app_tg1_t0_edge_int_map: APP_TG1_T0_EDGE_INT_MAP, pub app_tg1_t1_edge_int_map: APP_TG1_T1_EDGE_INT_MAP, pub app_tg1_wdt_edge_int_map: APP_TG1_WDT_EDGE_INT_MAP, pub app_tg1_lact_edge_int_map: APP_TG1_LACT_EDGE_INT_MAP, pub app_mmu_ia_int_map: APP_MMU_IA_INT_MAP, pub app_mpu_ia_int_map: APP_MPU_IA_INT_MAP, pub app_cache_ia_int_map: APP_CACHE_IA_INT_MAP, pub ahblite_mpu_table_uart: AHBLITE_MPU_TABLE_UART, pub ahblite_mpu_table_spi1: AHBLITE_MPU_TABLE_SPI1, pub ahblite_mpu_table_spi0: AHBLITE_MPU_TABLE_SPI0, pub ahblite_mpu_table_gpio: AHBLITE_MPU_TABLE_GPIO, pub ahblite_mpu_table_fe2: AHBLITE_MPU_TABLE_FE2, pub ahblite_mpu_table_fe: AHBLITE_MPU_TABLE_FE, pub ahblite_mpu_table_timer: AHBLITE_MPU_TABLE_TIMER, pub ahblite_mpu_table_rtc: AHBLITE_MPU_TABLE_RTC, pub ahblite_mpu_table_io_mux: AHBLITE_MPU_TABLE_IO_MUX, pub ahblite_mpu_table_wdg: AHBLITE_MPU_TABLE_WDG, pub ahblite_mpu_table_hinf: AHBLITE_MPU_TABLE_HINF, pub ahblite_mpu_table_uhci1: AHBLITE_MPU_TABLE_UHCI1, pub ahblite_mpu_table_misc: AHBLITE_MPU_TABLE_MISC, pub ahblite_mpu_table_i2c: AHBLITE_MPU_TABLE_I2C, pub ahblite_mpu_table_i2s0: AHBLITE_MPU_TABLE_I2S0, pub ahblite_mpu_table_uart1: AHBLITE_MPU_TABLE_UART1, pub ahblite_mpu_table_bt: AHBLITE_MPU_TABLE_BT, pub ahblite_mpu_table_bt_buffer: AHBLITE_MPU_TABLE_BT_BUFFER, pub ahblite_mpu_table_i2c_ext0: AHBLITE_MPU_TABLE_I2C_EXT0, pub ahblite_mpu_table_uhci0: AHBLITE_MPU_TABLE_UHCI0, pub ahblite_mpu_table_slchost: AHBLITE_MPU_TABLE_SLCHOST, pub ahblite_mpu_table_rmt: AHBLITE_MPU_TABLE_RMT, pub ahblite_mpu_table_pcnt: AHBLITE_MPU_TABLE_PCNT, pub ahblite_mpu_table_slc: AHBLITE_MPU_TABLE_SLC, pub ahblite_mpu_table_ledc: AHBLITE_MPU_TABLE_LEDC, pub ahblite_mpu_table_efuse: AHBLITE_MPU_TABLE_EFUSE, pub ahblite_mpu_table_spi_encrypt: AHBLITE_MPU_TABLE_SPI_ENCRYPT, pub ahblite_mpu_table_bb: AHBLITE_MPU_TABLE_BB, pub ahblite_mpu_table_pwm0: AHBLITE_MPU_TABLE_PWM0, pub ahblite_mpu_table_timergroup: AHBLITE_MPU_TABLE_TIMERGROUP, pub ahblite_mpu_table_timergroup1: AHBLITE_MPU_TABLE_TIMERGROUP1, pub ahblite_mpu_table_spi2: AHBLITE_MPU_TABLE_SPI2, pub ahblite_mpu_table_spi3: AHBLITE_MPU_TABLE_SPI3, pub ahblite_mpu_table_apb_ctrl: AHBLITE_MPU_TABLE_APB_CTRL, pub ahblite_mpu_table_i2c_ext1: AHBLITE_MPU_TABLE_I2C_EXT1, pub ahblite_mpu_table_sdio_host: AHBLITE_MPU_TABLE_SDIO_HOST, pub ahblite_mpu_table_emac: AHBLITE_MPU_TABLE_EMAC, pub ahblite_mpu_table_can: AHBLITE_MPU_TABLE_CAN, pub ahblite_mpu_table_pwm1: AHBLITE_MPU_TABLE_PWM1, pub ahblite_mpu_table_i2s1: AHBLITE_MPU_TABLE_I2S1, pub ahblite_mpu_table_uart2: AHBLITE_MPU_TABLE_UART2, pub ahblite_mpu_table_pwm2: AHBLITE_MPU_TABLE_PWM2, pub ahblite_mpu_table_pwm3: AHBLITE_MPU_TABLE_PWM3, pub ahblite_mpu_table_rwbt: AHBLITE_MPU_TABLE_RWBT, pub ahblite_mpu_table_btmac: AHBLITE_MPU_TABLE_BTMAC, pub ahblite_mpu_table_wifimac: AHBLITE_MPU_TABLE_WIFIMAC, pub ahblite_mpu_table_pwr: AHBLITE_MPU_TABLE_PWR, pub mem_access_dbug0: MEM_ACCESS_DBUG0, pub mem_access_dbug1: MEM_ACCESS_DBUG1, pub pro_dcache_dbug0: PRO_DCACHE_DBUG0, pub pro_dcache_dbug1: PRO_DCACHE_DBUG1, pub pro_dcache_dbug2: PRO_DCACHE_DBUG2, pub pro_dcache_dbug3: PRO_DCACHE_DBUG3, pub pro_dcache_dbug4: PRO_DCACHE_DBUG4, pub pro_dcache_dbug5: PRO_DCACHE_DBUG5, pub pro_dcache_dbug6: PRO_DCACHE_DBUG6, pub pro_dcache_dbug7: PRO_DCACHE_DBUG7, pub pro_dcache_dbug8: PRO_DCACHE_DBUG8, pub pro_dcache_dbug9: PRO_DCACHE_DBUG9, pub app_dcache_dbug0: APP_DCACHE_DBUG0, pub app_dcache_dbug1: APP_DCACHE_DBUG1, pub app_dcache_dbug2: APP_DCACHE_DBUG2, pub app_dcache_dbug3: APP_DCACHE_DBUG3, pub app_dcache_dbug4: APP_DCACHE_DBUG4, pub app_dcache_dbug5: APP_DCACHE_DBUG5, pub app_dcache_dbug6: APP_DCACHE_DBUG6, pub app_dcache_dbug7: APP_DCACHE_DBUG7, pub app_dcache_dbug8: APP_DCACHE_DBUG8, pub app_dcache_dbug9: APP_DCACHE_DBUG9, pub pro_cpu_record_ctrl: PRO_CPU_RECORD_CTRL, pub pro_cpu_record_status: PRO_CPU_RECORD_STATUS, pub pro_cpu_record_pid: PRO_CPU_RECORD_PID, pub pro_cpu_record_pdebuginst: PRO_CPU_RECORD_PDEBUGINST, pub pro_cpu_record_pdebugstatus: PRO_CPU_RECORD_PDEBUGSTATUS, pub pro_cpu_record_pdebugdata: PRO_CPU_RECORD_PDEBUGDATA, pub pro_cpu_record_pdebugpc: PRO_CPU_RECORD_PDEBUGPC, pub pro_cpu_record_pdebugls0stat: PRO_CPU_RECORD_PDEBUGLS0STAT, pub pro_cpu_record_pdebugls0addr: PRO_CPU_RECORD_PDEBUGLS0ADDR, pub pro_cpu_record_pdebugls0data: PRO_CPU_RECORD_PDEBUGLS0DATA, pub app_cpu_record_ctrl: APP_CPU_RECORD_CTRL, pub app_cpu_record_status: APP_CPU_RECORD_STATUS, pub app_cpu_record_pid: APP_CPU_RECORD_PID, pub app_cpu_record_pdebuginst: APP_CPU_RECORD_PDEBUGINST, pub app_cpu_record_pdebugstatus: APP_CPU_RECORD_PDEBUGSTATUS, pub app_cpu_record_pdebugdata: APP_CPU_RECORD_PDEBUGDATA, pub app_cpu_record_pdebugpc: APP_CPU_RECORD_PDEBUGPC, pub app_cpu_record_pdebugls0stat: APP_CPU_RECORD_PDEBUGLS0STAT, pub app_cpu_record_pdebugls0addr: APP_CPU_RECORD_PDEBUGLS0ADDR, pub app_cpu_record_pdebugls0data: APP_CPU_RECORD_PDEBUGLS0DATA, pub rsa_pd_ctrl: RSA_PD_CTRL, pub rom_mpu_table0: ROM_MPU_TABLE0, pub rom_mpu_table1: ROM_MPU_TABLE1, pub rom_mpu_table2: ROM_MPU_TABLE2, pub rom_mpu_table3: ROM_MPU_TABLE3, pub shrom_mpu_table0: SHROM_MPU_TABLE0, pub shrom_mpu_table1: SHROM_MPU_TABLE1, pub shrom_mpu_table2: SHROM_MPU_TABLE2, pub shrom_mpu_table3: SHROM_MPU_TABLE3, pub shrom_mpu_table4: SHROM_MPU_TABLE4, pub shrom_mpu_table5: SHROM_MPU_TABLE5, pub shrom_mpu_table6: SHROM_MPU_TABLE6, pub shrom_mpu_table7: SHROM_MPU_TABLE7, pub shrom_mpu_table8: SHROM_MPU_TABLE8, pub shrom_mpu_table9: SHROM_MPU_TABLE9, pub shrom_mpu_table10: SHROM_MPU_TABLE10, pub shrom_mpu_table11: SHROM_MPU_TABLE11, pub shrom_mpu_table12: SHROM_MPU_TABLE12, pub shrom_mpu_table13: SHROM_MPU_TABLE13, pub shrom_mpu_table14: SHROM_MPU_TABLE14, pub shrom_mpu_table15: SHROM_MPU_TABLE15, pub shrom_mpu_table16: SHROM_MPU_TABLE16, pub shrom_mpu_table17: SHROM_MPU_TABLE17, pub shrom_mpu_table18: SHROM_MPU_TABLE18, pub shrom_mpu_table19: SHROM_MPU_TABLE19, pub shrom_mpu_table20: SHROM_MPU_TABLE20, pub shrom_mpu_table21: SHROM_MPU_TABLE21, pub shrom_mpu_table22: SHROM_MPU_TABLE22, pub shrom_mpu_table23: SHROM_MPU_TABLE23, pub immu_table0: IMMU_TABLE0, pub immu_table1: IMMU_TABLE1, pub immu_table2: IMMU_TABLE2, pub immu_table3: IMMU_TABLE3, pub immu_table4: IMMU_TABLE4, pub immu_table5: IMMU_TABLE5, pub immu_table6: IMMU_TABLE6, pub immu_table7: IMMU_TABLE7, pub immu_table8: IMMU_TABLE8, pub immu_table9: IMMU_TABLE9, pub immu_table10: IMMU_TABLE10, pub immu_table11: IMMU_TABLE11, pub immu_table12: IMMU_TABLE12, pub immu_table13: IMMU_TABLE13, pub immu_table14: IMMU_TABLE14, pub immu_table15: IMMU_TABLE15, pub dmmu_table0: DMMU_TABLE0, pub dmmu_table1: DMMU_TABLE1, pub dmmu_table2: DMMU_TABLE2, pub dmmu_table3: DMMU_TABLE3, pub dmmu_table4: DMMU_TABLE4, pub dmmu_table5: DMMU_TABLE5, pub dmmu_table6: DMMU_TABLE6, pub dmmu_table7: DMMU_TABLE7, pub dmmu_table8: DMMU_TABLE8, pub dmmu_table9: DMMU_TABLE9, pub dmmu_table10: DMMU_TABLE10, pub dmmu_table11: DMMU_TABLE11, pub dmmu_table12: DMMU_TABLE12, pub dmmu_table13: DMMU_TABLE13, pub dmmu_table14: DMMU_TABLE14, pub dmmu_table15: DMMU_TABLE15, pub pro_intrusion_ctrl: PRO_INTRUSION_CTRL, pub pro_intrusion_status: PRO_INTRUSION_STATUS, pub app_intrusion_ctrl: APP_INTRUSION_CTRL, pub app_intrusion_status: APP_INTRUSION_STATUS, pub front_end_mem_pd: FRONT_END_MEM_PD, pub mmu_ia_int_en: MMU_IA_INT_EN, pub mpu_ia_int_en: MPU_IA_INT_EN, pub cache_ia_int_en: CACHE_IA_INT_EN, pub secure_boot_ctrl: SECURE_BOOT_CTRL, pub spi_dma_chan_sel: SPI_DMA_CHAN_SEL, pub pro_vecbase_ctrl: PRO_VECBASE_CTRL, pub pro_vecbase_set: PRO_VECBASE_SET, pub app_vecbase_ctrl: APP_VECBASE_CTRL, pub app_vecbase_set: APP_VECBASE_SET, pub date: DATE, /* private fields */
}
Expand description

Register block

Fields§

§pro_boot_remap_ctrl: PRO_BOOT_REMAP_CTRL

0x00 -

§app_boot_remap_ctrl: APP_BOOT_REMAP_CTRL

0x04 -

§access_check: ACCESS_CHECK

0x08 -

§pro_dport_apb_mask0: PRO_DPORT_APB_MASK0

0x0c -

§pro_dport_apb_mask1: PRO_DPORT_APB_MASK1

0x10 -

§app_dport_apb_mask0: APP_DPORT_APB_MASK0

0x14 -

§app_dport_apb_mask1: APP_DPORT_APB_MASK1

0x18 -

§peri_clk_en: PERI_CLK_EN

0x1c -

§peri_rst_en: PERI_RST_EN

0x20 -

§wifi_bb_cfg: WIFI_BB_CFG

0x24 -

§wifi_bb_cfg_2: WIFI_BB_CFG_2

0x28 -

§appcpu_ctrl_a: APPCPU_CTRL_A

0x2c -

§appcpu_ctrl_b: APPCPU_CTRL_B

0x30 -

§appcpu_ctrl_c: APPCPU_CTRL_C

0x34 -

§appcpu_ctrl_d: APPCPU_CTRL_D

0x38 -

§cpu_per_conf: CPU_PER_CONF

0x3c -

§pro_cache_ctrl: PRO_CACHE_CTRL

0x40 -

§pro_cache_ctrl1: PRO_CACHE_CTRL1

0x44 -

§pro_cache_lock_0_addr: PRO_CACHE_LOCK_0_ADDR

0x48 -

§pro_cache_lock_1_addr: PRO_CACHE_LOCK_1_ADDR

0x4c -

§pro_cache_lock_2_addr: PRO_CACHE_LOCK_2_ADDR

0x50 -

§pro_cache_lock_3_addr: PRO_CACHE_LOCK_3_ADDR

0x54 -

§app_cache_ctrl: APP_CACHE_CTRL

0x58 -

§app_cache_ctrl1: APP_CACHE_CTRL1

0x5c -

§app_cache_lock_0_addr: APP_CACHE_LOCK_0_ADDR

0x60 -

§app_cache_lock_1_addr: APP_CACHE_LOCK_1_ADDR

0x64 -

§app_cache_lock_2_addr: APP_CACHE_LOCK_2_ADDR

0x68 -

§app_cache_lock_3_addr: APP_CACHE_LOCK_3_ADDR

0x6c -

§tracemem_mux_mode: TRACEMEM_MUX_MODE

0x70 -

§pro_tracemem_ena: PRO_TRACEMEM_ENA

0x74 -

§app_tracemem_ena: APP_TRACEMEM_ENA

0x78 -

§cache_mux_mode: CACHE_MUX_MODE

0x7c -

§immu_page_mode: IMMU_PAGE_MODE

0x80 -

§dmmu_page_mode: DMMU_PAGE_MODE

0x84 -

§rom_mpu_ena: ROM_MPU_ENA

0x88 -

§mem_pd_mask: MEM_PD_MASK

0x8c -

§rom_pd_ctrl: ROM_PD_CTRL

0x90 -

§rom_fo_ctrl: ROM_FO_CTRL

0x94 -

§sram_pd_ctrl_0: SRAM_PD_CTRL_0

0x98 -

§sram_pd_ctrl_1: SRAM_PD_CTRL_1

0x9c -

§sram_fo_ctrl_0: SRAM_FO_CTRL_0

0xa0 -

§sram_fo_ctrl_1: SRAM_FO_CTRL_1

0xa4 -

§iram_dram_ahb_sel: IRAM_DRAM_AHB_SEL

0xa8 -

§tag_fo_ctrl: TAG_FO_CTRL

0xac -

§ahb_lite_mask: AHB_LITE_MASK

0xb0 -

§ahb_mpu_table_0: AHB_MPU_TABLE_0

0xb4 -

§ahb_mpu_table_1: AHB_MPU_TABLE_1

0xb8 -

§host_inf_sel: HOST_INF_SEL

0xbc -

§perip_clk_en: PERIP_CLK_EN

0xc0 -

§perip_rst_en: PERIP_RST_EN

0xc4 -

§slave_spi_config: SLAVE_SPI_CONFIG

0xc8 -

§wifi_clk_en: WIFI_CLK_EN

0xcc -

§core_rst_en: CORE_RST_EN

0xd0 -

§bt_lpck_div_int: BT_LPCK_DIV_INT

0xd4 -

§bt_lpck_div_frac: BT_LPCK_DIV_FRAC

0xd8 -

§cpu_intr_from_cpu_0: CPU_INTR_FROM_CPU_0

0xdc -

§cpu_intr_from_cpu_1: CPU_INTR_FROM_CPU_1

0xe0 -

§cpu_intr_from_cpu_2: CPU_INTR_FROM_CPU_2

0xe4 -

§cpu_intr_from_cpu_3: CPU_INTR_FROM_CPU_3

0xe8 -

§pro_intr_status_0: PRO_INTR_STATUS_0

0xec -

§pro_intr_status_1: PRO_INTR_STATUS_1

0xf0 -

§pro_intr_status_2: PRO_INTR_STATUS_2

0xf4 -

§app_intr_status_0: APP_INTR_STATUS_0

0xf8 -

§app_intr_status_1: APP_INTR_STATUS_1

0xfc -

§app_intr_status_2: APP_INTR_STATUS_2

0x100 -

§pro_mac_intr_map: PRO_MAC_INTR_MAP

0x104 -

§pro_mac_nmi_map: PRO_MAC_NMI_MAP

0x108 -

§pro_bb_int_map: PRO_BB_INT_MAP

0x10c -

§pro_bt_mac_int_map: PRO_BT_MAC_INT_MAP

0x110 -

§pro_bt_bb_int_map: PRO_BT_BB_INT_MAP

0x114 -

§pro_bt_bb_nmi_map: PRO_BT_BB_NMI_MAP

0x118 -

§pro_rwbt_irq_map: PRO_RWBT_IRQ_MAP

0x11c -

§pro_rwble_irq_map: PRO_RWBLE_IRQ_MAP

0x120 -

§pro_rwbt_nmi_map: PRO_RWBT_NMI_MAP

0x124 -

§pro_rwble_nmi_map: PRO_RWBLE_NMI_MAP

0x128 -

§pro_slc0_intr_map: PRO_SLC0_INTR_MAP

0x12c -

§pro_slc1_intr_map: PRO_SLC1_INTR_MAP

0x130 -

§pro_uhci0_intr_map: PRO_UHCI0_INTR_MAP

0x134 -

§pro_uhci1_intr_map: PRO_UHCI1_INTR_MAP

0x138 -

§pro_tg_t0_level_int_map: PRO_TG_T0_LEVEL_INT_MAP

0x13c -

§pro_tg_t1_level_int_map: PRO_TG_T1_LEVEL_INT_MAP

0x140 -

§pro_tg_wdt_level_int_map: PRO_TG_WDT_LEVEL_INT_MAP

0x144 -

§pro_tg_lact_level_int_map: PRO_TG_LACT_LEVEL_INT_MAP

0x148 -

§pro_tg1_t0_level_int_map: PRO_TG1_T0_LEVEL_INT_MAP

0x14c -

§pro_tg1_t1_level_int_map: PRO_TG1_T1_LEVEL_INT_MAP

0x150 -

§pro_tg1_wdt_level_int_map: PRO_TG1_WDT_LEVEL_INT_MAP

0x154 -

§pro_tg1_lact_level_int_map: PRO_TG1_LACT_LEVEL_INT_MAP

0x158 -

§pro_gpio_interrupt_map: PRO_GPIO_INTERRUPT_MAP

0x15c -

§pro_gpio_interrupt_nmi_map: PRO_GPIO_INTERRUPT_NMI_MAP

0x160 -

§pro_cpu_intr_from_cpu_0_map: PRO_CPU_INTR_FROM_CPU_0_MAP

0x164 -

§pro_cpu_intr_from_cpu_1_map: PRO_CPU_INTR_FROM_CPU_1_MAP

0x168 -

§pro_cpu_intr_from_cpu_2_map: PRO_CPU_INTR_FROM_CPU_2_MAP

0x16c -

§pro_cpu_intr_from_cpu_3_map: PRO_CPU_INTR_FROM_CPU_3_MAP

0x170 -

§pro_spi_intr_0_map: PRO_SPI_INTR_0_MAP

0x174 -

§pro_spi_intr_1_map: PRO_SPI_INTR_1_MAP

0x178 -

§pro_spi_intr_2_map: PRO_SPI_INTR_2_MAP

0x17c -

§pro_spi_intr_3_map: PRO_SPI_INTR_3_MAP

0x180 -

§pro_i2s0_int_map: PRO_I2S0_INT_MAP

0x184 -

§pro_i2s1_int_map: PRO_I2S1_INT_MAP

0x188 -

§pro_uart_intr_map: PRO_UART_INTR_MAP

0x18c -

§pro_uart1_intr_map: PRO_UART1_INTR_MAP

0x190 -

§pro_uart2_intr_map: PRO_UART2_INTR_MAP

0x194 -

§pro_sdio_host_interrupt_map: PRO_SDIO_HOST_INTERRUPT_MAP

0x198 -

§pro_emac_int_map: PRO_EMAC_INT_MAP

0x19c -

§pro_pwm0_intr_map: PRO_PWM0_INTR_MAP

0x1a0 -

§pro_pwm1_intr_map: PRO_PWM1_INTR_MAP

0x1a4 -

§pro_pwm2_intr_map: PRO_PWM2_INTR_MAP

0x1a8 -

§pro_pwm3_intr_map: PRO_PWM3_INTR_MAP

0x1ac -

§pro_ledc_int_map: PRO_LEDC_INT_MAP

0x1b0 -

§pro_efuse_int_map: PRO_EFUSE_INT_MAP

0x1b4 -

§pro_can_int_map: PRO_CAN_INT_MAP

0x1b8 -

§pro_rtc_core_intr_map: PRO_RTC_CORE_INTR_MAP

0x1bc -

§pro_rmt_intr_map: PRO_RMT_INTR_MAP

0x1c0 -

§pro_pcnt_intr_map: PRO_PCNT_INTR_MAP

0x1c4 -

§pro_i2c_ext0_intr_map: PRO_I2C_EXT0_INTR_MAP

0x1c8 -

§pro_i2c_ext1_intr_map: PRO_I2C_EXT1_INTR_MAP

0x1cc -

§pro_rsa_intr_map: PRO_RSA_INTR_MAP

0x1d0 -

§pro_spi1_dma_int_map: PRO_SPI1_DMA_INT_MAP

0x1d4 -

§pro_spi2_dma_int_map: PRO_SPI2_DMA_INT_MAP

0x1d8 -

§pro_spi3_dma_int_map: PRO_SPI3_DMA_INT_MAP

0x1dc -

§pro_wdg_int_map: PRO_WDG_INT_MAP

0x1e0 -

§pro_timer_int1_map: PRO_TIMER_INT1_MAP

0x1e4 -

§pro_timer_int2_map: PRO_TIMER_INT2_MAP

0x1e8 -

§pro_tg_t0_edge_int_map: PRO_TG_T0_EDGE_INT_MAP

0x1ec -

§pro_tg_t1_edge_int_map: PRO_TG_T1_EDGE_INT_MAP

0x1f0 -

§pro_tg_wdt_edge_int_map: PRO_TG_WDT_EDGE_INT_MAP

0x1f4 -

§pro_tg_lact_edge_int_map: PRO_TG_LACT_EDGE_INT_MAP

0x1f8 -

§pro_tg1_t0_edge_int_map: PRO_TG1_T0_EDGE_INT_MAP

0x1fc -

§pro_tg1_t1_edge_int_map: PRO_TG1_T1_EDGE_INT_MAP

0x200 -

§pro_tg1_wdt_edge_int_map: PRO_TG1_WDT_EDGE_INT_MAP

0x204 -

§pro_tg1_lact_edge_int_map: PRO_TG1_LACT_EDGE_INT_MAP

0x208 -

§pro_mmu_ia_int_map: PRO_MMU_IA_INT_MAP

0x20c -

§pro_mpu_ia_int_map: PRO_MPU_IA_INT_MAP

0x210 -

§pro_cache_ia_int_map: PRO_CACHE_IA_INT_MAP

0x214 -

§app_mac_intr_map: APP_MAC_INTR_MAP

0x218 -

§app_mac_nmi_map: APP_MAC_NMI_MAP

0x21c -

§app_bb_int_map: APP_BB_INT_MAP

0x220 -

§app_bt_mac_int_map: APP_BT_MAC_INT_MAP

0x224 -

§app_bt_bb_int_map: APP_BT_BB_INT_MAP

0x228 -

§app_bt_bb_nmi_map: APP_BT_BB_NMI_MAP

0x22c -

§app_rwbt_irq_map: APP_RWBT_IRQ_MAP

0x230 -

§app_rwble_irq_map: APP_RWBLE_IRQ_MAP

0x234 -

§app_rwbt_nmi_map: APP_RWBT_NMI_MAP

0x238 -

§app_rwble_nmi_map: APP_RWBLE_NMI_MAP

0x23c -

§app_slc0_intr_map: APP_SLC0_INTR_MAP

0x240 -

§app_slc1_intr_map: APP_SLC1_INTR_MAP

0x244 -

§app_uhci0_intr_map: APP_UHCI0_INTR_MAP

0x248 -

§app_uhci1_intr_map: APP_UHCI1_INTR_MAP

0x24c -

§app_tg_t0_level_int_map: APP_TG_T0_LEVEL_INT_MAP

0x250 -

§app_tg_t1_level_int_map: APP_TG_T1_LEVEL_INT_MAP

0x254 -

§app_tg_wdt_level_int_map: APP_TG_WDT_LEVEL_INT_MAP

0x258 -

§app_tg_lact_level_int_map: APP_TG_LACT_LEVEL_INT_MAP

0x25c -

§app_tg1_t0_level_int_map: APP_TG1_T0_LEVEL_INT_MAP

0x260 -

§app_tg1_t1_level_int_map: APP_TG1_T1_LEVEL_INT_MAP

0x264 -

§app_tg1_wdt_level_int_map: APP_TG1_WDT_LEVEL_INT_MAP

0x268 -

§app_tg1_lact_level_int_map: APP_TG1_LACT_LEVEL_INT_MAP

0x26c -

§app_gpio_interrupt_map: APP_GPIO_INTERRUPT_MAP

0x270 -

§app_gpio_interrupt_nmi_map: APP_GPIO_INTERRUPT_NMI_MAP

0x274 -

§app_cpu_intr_from_cpu_0_map: APP_CPU_INTR_FROM_CPU_0_MAP

0x278 -

§app_cpu_intr_from_cpu_1_map: APP_CPU_INTR_FROM_CPU_1_MAP

0x27c -

§app_cpu_intr_from_cpu_2_map: APP_CPU_INTR_FROM_CPU_2_MAP

0x280 -

§app_cpu_intr_from_cpu_3_map: APP_CPU_INTR_FROM_CPU_3_MAP

0x284 -

§app_spi_intr_0_map: APP_SPI_INTR_0_MAP

0x288 -

§app_spi_intr_1_map: APP_SPI_INTR_1_MAP

0x28c -

§app_spi_intr_2_map: APP_SPI_INTR_2_MAP

0x290 -

§app_spi_intr_3_map: APP_SPI_INTR_3_MAP

0x294 -

§app_i2s0_int_map: APP_I2S0_INT_MAP

0x298 -

§app_i2s1_int_map: APP_I2S1_INT_MAP

0x29c -

§app_uart_intr_map: APP_UART_INTR_MAP

0x2a0 -

§app_uart1_intr_map: APP_UART1_INTR_MAP

0x2a4 -

§app_uart2_intr_map: APP_UART2_INTR_MAP

0x2a8 -

§app_sdio_host_interrupt_map: APP_SDIO_HOST_INTERRUPT_MAP

0x2ac -

§app_emac_int_map: APP_EMAC_INT_MAP

0x2b0 -

§app_pwm0_intr_map: APP_PWM0_INTR_MAP

0x2b4 -

§app_pwm1_intr_map: APP_PWM1_INTR_MAP

0x2b8 -

§app_pwm2_intr_map: APP_PWM2_INTR_MAP

0x2bc -

§app_pwm3_intr_map: APP_PWM3_INTR_MAP

0x2c0 -

§app_ledc_int_map: APP_LEDC_INT_MAP

0x2c4 -

§app_efuse_int_map: APP_EFUSE_INT_MAP

0x2c8 -

§app_can_int_map: APP_CAN_INT_MAP

0x2cc -

§app_rtc_core_intr_map: APP_RTC_CORE_INTR_MAP

0x2d0 -

§app_rmt_intr_map: APP_RMT_INTR_MAP

0x2d4 -

§app_pcnt_intr_map: APP_PCNT_INTR_MAP

0x2d8 -

§app_i2c_ext0_intr_map: APP_I2C_EXT0_INTR_MAP

0x2dc -

§app_i2c_ext1_intr_map: APP_I2C_EXT1_INTR_MAP

0x2e0 -

§app_rsa_intr_map: APP_RSA_INTR_MAP

0x2e4 -

§app_spi1_dma_int_map: APP_SPI1_DMA_INT_MAP

0x2e8 -

§app_spi2_dma_int_map: APP_SPI2_DMA_INT_MAP

0x2ec -

§app_spi3_dma_int_map: APP_SPI3_DMA_INT_MAP

0x2f0 -

§app_wdg_int_map: APP_WDG_INT_MAP

0x2f4 -

§app_timer_int1_map: APP_TIMER_INT1_MAP

0x2f8 -

§app_timer_int2_map: APP_TIMER_INT2_MAP

0x2fc -

§app_tg_t0_edge_int_map: APP_TG_T0_EDGE_INT_MAP

0x300 -

§app_tg_t1_edge_int_map: APP_TG_T1_EDGE_INT_MAP

0x304 -

§app_tg_wdt_edge_int_map: APP_TG_WDT_EDGE_INT_MAP

0x308 -

§app_tg_lact_edge_int_map: APP_TG_LACT_EDGE_INT_MAP

0x30c -

§app_tg1_t0_edge_int_map: APP_TG1_T0_EDGE_INT_MAP

0x310 -

§app_tg1_t1_edge_int_map: APP_TG1_T1_EDGE_INT_MAP

0x314 -

§app_tg1_wdt_edge_int_map: APP_TG1_WDT_EDGE_INT_MAP

0x318 -

§app_tg1_lact_edge_int_map: APP_TG1_LACT_EDGE_INT_MAP

0x31c -

§app_mmu_ia_int_map: APP_MMU_IA_INT_MAP

0x320 -

§app_mpu_ia_int_map: APP_MPU_IA_INT_MAP

0x324 -

§app_cache_ia_int_map: APP_CACHE_IA_INT_MAP

0x328 -

§ahblite_mpu_table_uart: AHBLITE_MPU_TABLE_UART

0x32c -

§ahblite_mpu_table_spi1: AHBLITE_MPU_TABLE_SPI1

0x330 -

§ahblite_mpu_table_spi0: AHBLITE_MPU_TABLE_SPI0

0x334 -

§ahblite_mpu_table_gpio: AHBLITE_MPU_TABLE_GPIO

0x338 -

§ahblite_mpu_table_fe2: AHBLITE_MPU_TABLE_FE2

0x33c -

§ahblite_mpu_table_fe: AHBLITE_MPU_TABLE_FE

0x340 -

§ahblite_mpu_table_timer: AHBLITE_MPU_TABLE_TIMER

0x344 -

§ahblite_mpu_table_rtc: AHBLITE_MPU_TABLE_RTC

0x348 -

§ahblite_mpu_table_io_mux: AHBLITE_MPU_TABLE_IO_MUX

0x34c -

§ahblite_mpu_table_wdg: AHBLITE_MPU_TABLE_WDG

0x350 -

§ahblite_mpu_table_hinf: AHBLITE_MPU_TABLE_HINF

0x354 -

§ahblite_mpu_table_uhci1: AHBLITE_MPU_TABLE_UHCI1

0x358 -

§ahblite_mpu_table_misc: AHBLITE_MPU_TABLE_MISC

0x35c -

§ahblite_mpu_table_i2c: AHBLITE_MPU_TABLE_I2C

0x360 -

§ahblite_mpu_table_i2s0: AHBLITE_MPU_TABLE_I2S0

0x364 -

§ahblite_mpu_table_uart1: AHBLITE_MPU_TABLE_UART1

0x368 -

§ahblite_mpu_table_bt: AHBLITE_MPU_TABLE_BT

0x36c -

§ahblite_mpu_table_bt_buffer: AHBLITE_MPU_TABLE_BT_BUFFER

0x370 -

§ahblite_mpu_table_i2c_ext0: AHBLITE_MPU_TABLE_I2C_EXT0

0x374 -

§ahblite_mpu_table_uhci0: AHBLITE_MPU_TABLE_UHCI0

0x378 -

§ahblite_mpu_table_slchost: AHBLITE_MPU_TABLE_SLCHOST

0x37c -

§ahblite_mpu_table_rmt: AHBLITE_MPU_TABLE_RMT

0x380 -

§ahblite_mpu_table_pcnt: AHBLITE_MPU_TABLE_PCNT

0x384 -

§ahblite_mpu_table_slc: AHBLITE_MPU_TABLE_SLC

0x388 -

§ahblite_mpu_table_ledc: AHBLITE_MPU_TABLE_LEDC

0x38c -

§ahblite_mpu_table_efuse: AHBLITE_MPU_TABLE_EFUSE

0x390 -

§ahblite_mpu_table_spi_encrypt: AHBLITE_MPU_TABLE_SPI_ENCRYPT

0x394 -

§ahblite_mpu_table_bb: AHBLITE_MPU_TABLE_BB

0x398 -

§ahblite_mpu_table_pwm0: AHBLITE_MPU_TABLE_PWM0

0x39c -

§ahblite_mpu_table_timergroup: AHBLITE_MPU_TABLE_TIMERGROUP

0x3a0 -

§ahblite_mpu_table_timergroup1: AHBLITE_MPU_TABLE_TIMERGROUP1

0x3a4 -

§ahblite_mpu_table_spi2: AHBLITE_MPU_TABLE_SPI2

0x3a8 -

§ahblite_mpu_table_spi3: AHBLITE_MPU_TABLE_SPI3

0x3ac -

§ahblite_mpu_table_apb_ctrl: AHBLITE_MPU_TABLE_APB_CTRL

0x3b0 -

§ahblite_mpu_table_i2c_ext1: AHBLITE_MPU_TABLE_I2C_EXT1

0x3b4 -

§ahblite_mpu_table_sdio_host: AHBLITE_MPU_TABLE_SDIO_HOST

0x3b8 -

§ahblite_mpu_table_emac: AHBLITE_MPU_TABLE_EMAC

0x3bc -

§ahblite_mpu_table_can: AHBLITE_MPU_TABLE_CAN

0x3c0 -

§ahblite_mpu_table_pwm1: AHBLITE_MPU_TABLE_PWM1

0x3c4 -

§ahblite_mpu_table_i2s1: AHBLITE_MPU_TABLE_I2S1

0x3c8 -

§ahblite_mpu_table_uart2: AHBLITE_MPU_TABLE_UART2

0x3cc -

§ahblite_mpu_table_pwm2: AHBLITE_MPU_TABLE_PWM2

0x3d0 -

§ahblite_mpu_table_pwm3: AHBLITE_MPU_TABLE_PWM3

0x3d4 -

§ahblite_mpu_table_rwbt: AHBLITE_MPU_TABLE_RWBT

0x3d8 -

§ahblite_mpu_table_btmac: AHBLITE_MPU_TABLE_BTMAC

0x3dc -

§ahblite_mpu_table_wifimac: AHBLITE_MPU_TABLE_WIFIMAC

0x3e0 -

§ahblite_mpu_table_pwr: AHBLITE_MPU_TABLE_PWR

0x3e4 -

§mem_access_dbug0: MEM_ACCESS_DBUG0

0x3e8 -

§mem_access_dbug1: MEM_ACCESS_DBUG1

0x3ec -

§pro_dcache_dbug0: PRO_DCACHE_DBUG0

0x3f0 -

§pro_dcache_dbug1: PRO_DCACHE_DBUG1

0x3f4 -

§pro_dcache_dbug2: PRO_DCACHE_DBUG2

0x3f8 -

§pro_dcache_dbug3: PRO_DCACHE_DBUG3

0x3fc -

§pro_dcache_dbug4: PRO_DCACHE_DBUG4

0x400 -

§pro_dcache_dbug5: PRO_DCACHE_DBUG5

0x404 -

§pro_dcache_dbug6: PRO_DCACHE_DBUG6

0x408 -

§pro_dcache_dbug7: PRO_DCACHE_DBUG7

0x40c -

§pro_dcache_dbug8: PRO_DCACHE_DBUG8

0x410 -

§pro_dcache_dbug9: PRO_DCACHE_DBUG9

0x414 -

§app_dcache_dbug0: APP_DCACHE_DBUG0

0x418 -

§app_dcache_dbug1: APP_DCACHE_DBUG1

0x41c -

§app_dcache_dbug2: APP_DCACHE_DBUG2

0x420 -

§app_dcache_dbug3: APP_DCACHE_DBUG3

0x424 -

§app_dcache_dbug4: APP_DCACHE_DBUG4

0x428 -

§app_dcache_dbug5: APP_DCACHE_DBUG5

0x42c -

§app_dcache_dbug6: APP_DCACHE_DBUG6

0x430 -

§app_dcache_dbug7: APP_DCACHE_DBUG7

0x434 -

§app_dcache_dbug8: APP_DCACHE_DBUG8

0x438 -

§app_dcache_dbug9: APP_DCACHE_DBUG9

0x43c -

§pro_cpu_record_ctrl: PRO_CPU_RECORD_CTRL

0x440 -

§pro_cpu_record_status: PRO_CPU_RECORD_STATUS

0x444 -

§pro_cpu_record_pid: PRO_CPU_RECORD_PID

0x448 -

§pro_cpu_record_pdebuginst: PRO_CPU_RECORD_PDEBUGINST

0x44c -

§pro_cpu_record_pdebugstatus: PRO_CPU_RECORD_PDEBUGSTATUS

0x450 -

§pro_cpu_record_pdebugdata: PRO_CPU_RECORD_PDEBUGDATA

0x454 -

§pro_cpu_record_pdebugpc: PRO_CPU_RECORD_PDEBUGPC

0x458 -

§pro_cpu_record_pdebugls0stat: PRO_CPU_RECORD_PDEBUGLS0STAT

0x45c -

§pro_cpu_record_pdebugls0addr: PRO_CPU_RECORD_PDEBUGLS0ADDR

0x460 -

§pro_cpu_record_pdebugls0data: PRO_CPU_RECORD_PDEBUGLS0DATA

0x464 -

§app_cpu_record_ctrl: APP_CPU_RECORD_CTRL

0x468 -

§app_cpu_record_status: APP_CPU_RECORD_STATUS

0x46c -

§app_cpu_record_pid: APP_CPU_RECORD_PID

0x470 -

§app_cpu_record_pdebuginst: APP_CPU_RECORD_PDEBUGINST

0x474 -

§app_cpu_record_pdebugstatus: APP_CPU_RECORD_PDEBUGSTATUS

0x478 -

§app_cpu_record_pdebugdata: APP_CPU_RECORD_PDEBUGDATA

0x47c -

§app_cpu_record_pdebugpc: APP_CPU_RECORD_PDEBUGPC

0x480 -

§app_cpu_record_pdebugls0stat: APP_CPU_RECORD_PDEBUGLS0STAT

0x484 -

§app_cpu_record_pdebugls0addr: APP_CPU_RECORD_PDEBUGLS0ADDR

0x488 -

§app_cpu_record_pdebugls0data: APP_CPU_RECORD_PDEBUGLS0DATA

0x48c -

§rsa_pd_ctrl: RSA_PD_CTRL

0x490 -

§rom_mpu_table0: ROM_MPU_TABLE0

0x494 -

§rom_mpu_table1: ROM_MPU_TABLE1

0x498 -

§rom_mpu_table2: ROM_MPU_TABLE2

0x49c -

§rom_mpu_table3: ROM_MPU_TABLE3

0x4a0 -

§shrom_mpu_table0: SHROM_MPU_TABLE0

0x4a4 -

§shrom_mpu_table1: SHROM_MPU_TABLE1

0x4a8 -

§shrom_mpu_table2: SHROM_MPU_TABLE2

0x4ac -

§shrom_mpu_table3: SHROM_MPU_TABLE3

0x4b0 -

§shrom_mpu_table4: SHROM_MPU_TABLE4

0x4b4 -

§shrom_mpu_table5: SHROM_MPU_TABLE5

0x4b8 -

§shrom_mpu_table6: SHROM_MPU_TABLE6

0x4bc -

§shrom_mpu_table7: SHROM_MPU_TABLE7

0x4c0 -

§shrom_mpu_table8: SHROM_MPU_TABLE8

0x4c4 -

§shrom_mpu_table9: SHROM_MPU_TABLE9

0x4c8 -

§shrom_mpu_table10: SHROM_MPU_TABLE10

0x4cc -

§shrom_mpu_table11: SHROM_MPU_TABLE11

0x4d0 -

§shrom_mpu_table12: SHROM_MPU_TABLE12

0x4d4 -

§shrom_mpu_table13: SHROM_MPU_TABLE13

0x4d8 -

§shrom_mpu_table14: SHROM_MPU_TABLE14

0x4dc -

§shrom_mpu_table15: SHROM_MPU_TABLE15

0x4e0 -

§shrom_mpu_table16: SHROM_MPU_TABLE16

0x4e4 -

§shrom_mpu_table17: SHROM_MPU_TABLE17

0x4e8 -

§shrom_mpu_table18: SHROM_MPU_TABLE18

0x4ec -

§shrom_mpu_table19: SHROM_MPU_TABLE19

0x4f0 -

§shrom_mpu_table20: SHROM_MPU_TABLE20

0x4f4 -

§shrom_mpu_table21: SHROM_MPU_TABLE21

0x4f8 -

§shrom_mpu_table22: SHROM_MPU_TABLE22

0x4fc -

§shrom_mpu_table23: SHROM_MPU_TABLE23

0x500 -

§immu_table0: IMMU_TABLE0

0x504 -

§immu_table1: IMMU_TABLE1

0x508 -

§immu_table2: IMMU_TABLE2

0x50c -

§immu_table3: IMMU_TABLE3

0x510 -

§immu_table4: IMMU_TABLE4

0x514 -

§immu_table5: IMMU_TABLE5

0x518 -

§immu_table6: IMMU_TABLE6

0x51c -

§immu_table7: IMMU_TABLE7

0x520 -

§immu_table8: IMMU_TABLE8

0x524 -

§immu_table9: IMMU_TABLE9

0x528 -

§immu_table10: IMMU_TABLE10

0x52c -

§immu_table11: IMMU_TABLE11

0x530 -

§immu_table12: IMMU_TABLE12

0x534 -

§immu_table13: IMMU_TABLE13

0x538 -

§immu_table14: IMMU_TABLE14

0x53c -

§immu_table15: IMMU_TABLE15

0x540 -

§dmmu_table0: DMMU_TABLE0

0x544 -

§dmmu_table1: DMMU_TABLE1

0x548 -

§dmmu_table2: DMMU_TABLE2

0x54c -

§dmmu_table3: DMMU_TABLE3

0x550 -

§dmmu_table4: DMMU_TABLE4

0x554 -

§dmmu_table5: DMMU_TABLE5

0x558 -

§dmmu_table6: DMMU_TABLE6

0x55c -

§dmmu_table7: DMMU_TABLE7

0x560 -

§dmmu_table8: DMMU_TABLE8

0x564 -

§dmmu_table9: DMMU_TABLE9

0x568 -

§dmmu_table10: DMMU_TABLE10

0x56c -

§dmmu_table11: DMMU_TABLE11

0x570 -

§dmmu_table12: DMMU_TABLE12

0x574 -

§dmmu_table13: DMMU_TABLE13

0x578 -

§dmmu_table14: DMMU_TABLE14

0x57c -

§dmmu_table15: DMMU_TABLE15

0x580 -

§pro_intrusion_ctrl: PRO_INTRUSION_CTRL

0x584 -

§pro_intrusion_status: PRO_INTRUSION_STATUS

0x588 -

§app_intrusion_ctrl: APP_INTRUSION_CTRL

0x58c -

§app_intrusion_status: APP_INTRUSION_STATUS

0x590 -

§front_end_mem_pd: FRONT_END_MEM_PD

0x594 -

§mmu_ia_int_en: MMU_IA_INT_EN

0x598 -

§mpu_ia_int_en: MPU_IA_INT_EN

0x59c -

§cache_ia_int_en: CACHE_IA_INT_EN

0x5a0 -

§secure_boot_ctrl: SECURE_BOOT_CTRL

0x5a4 -

§spi_dma_chan_sel: SPI_DMA_CHAN_SEL

0x5a8 -

§pro_vecbase_ctrl: PRO_VECBASE_CTRL

0x5ac -

§pro_vecbase_set: PRO_VECBASE_SET

0x5b0 -

§app_vecbase_ctrl: APP_VECBASE_CTRL

0x5b4 -

§app_vecbase_set: APP_VECBASE_SET

0x5b8 -

§date: DATE

0xffc -

Auto Trait Implementations§

Blanket Implementations§

source§

impl<T> Any for Twhere T: 'static + ?Sized,

source§

fn type_id(&self) -> TypeId

Gets the TypeId of self. Read more
source§

impl<T> Borrow<T> for Twhere T: ?Sized,

source§

fn borrow(&self) -> &T

Immutably borrows from an owned value. Read more
source§

impl<T> BorrowMut<T> for Twhere T: ?Sized,

source§

fn borrow_mut(&mut self) -> &mut T

Mutably borrows from an owned value. Read more
source§

impl<T> From<T> for T

source§

fn from(t: T) -> T

Returns the argument unchanged.

source§

impl<T, U> Into<U> for Twhere U: From<T>,

source§

fn into(self) -> U

Calls U::from(self).

That is, this conversion is whatever the implementation of From<T> for U chooses to do.

source§

impl<T, U> TryFrom<U> for Twhere U: Into<T>,

§

type Error = Infallible

The type returned in the event of a conversion error.
source§

fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>

Performs the conversion.
source§

impl<T, U> TryInto<U> for Twhere U: TryFrom<T>,

§

type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.
source§

fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>

Performs the conversion.