Struct esp32::spi0::cache_sctrl::W
source · pub struct W(_);
Expand description
Register CACHE_SCTRL
writer
Implementations§
source§impl W
impl W
sourcepub fn usr_sram_dio(&mut self) -> USR_SRAM_DIO_W<'_, 1>
pub fn usr_sram_dio(&mut self) -> USR_SRAM_DIO_W<'_, 1>
Bit 1 - For SPI0 In the spi sram mode spi dual I/O mode enable 1: enable 0:disable
sourcepub fn usr_sram_qio(&mut self) -> USR_SRAM_QIO_W<'_, 2>
pub fn usr_sram_qio(&mut self) -> USR_SRAM_QIO_W<'_, 2>
Bit 2 - For SPI0 In the spi sram mode spi quad I/O mode enable 1: enable 0:disable
sourcepub fn usr_wr_sram_dummy(&mut self) -> USR_WR_SRAM_DUMMY_W<'_, 3>
pub fn usr_wr_sram_dummy(&mut self) -> USR_WR_SRAM_DUMMY_W<'_, 3>
Bit 3 - For SPI0 In the spi sram mode it is the enable bit of dummy phase for write operations.
sourcepub fn usr_rd_sram_dummy(&mut self) -> USR_RD_SRAM_DUMMY_W<'_, 4>
pub fn usr_rd_sram_dummy(&mut self) -> USR_RD_SRAM_DUMMY_W<'_, 4>
Bit 4 - For SPI0 In the spi sram mode it is the enable bit of dummy phase for read operations.
sourcepub fn cache_sram_usr_rcmd(&mut self) -> CACHE_SRAM_USR_RCMD_W<'_, 5>
pub fn cache_sram_usr_rcmd(&mut self) -> CACHE_SRAM_USR_RCMD_W<'_, 5>
Bit 5 - For SPI0 In the spi sram mode cache read sram for user define command.
sourcepub fn sram_bytes_len(&mut self) -> SRAM_BYTES_LEN_W<'_, 6>
pub fn sram_bytes_len(&mut self) -> SRAM_BYTES_LEN_W<'_, 6>
Bits 6:13 - For SPI0 In the sram mode it is the byte length of spi read sram data.
sourcepub fn sram_dummy_cyclelen(&mut self) -> SRAM_DUMMY_CYCLELEN_W<'_, 14>
pub fn sram_dummy_cyclelen(&mut self) -> SRAM_DUMMY_CYCLELEN_W<'_, 14>
Bits 14:21 - For SPI0 In the sram mode it is the length in bits of address phase. The register value shall be (bit_num-1).
sourcepub fn sram_addr_bitlen(&mut self) -> SRAM_ADDR_BITLEN_W<'_, 22>
pub fn sram_addr_bitlen(&mut self) -> SRAM_ADDR_BITLEN_W<'_, 22>
Bits 22:27 - For SPI0 In the sram mode it is the length in bits of address phase. The register value shall be (bit_num-1).
sourcepub fn cache_sram_usr_wcmd(&mut self) -> CACHE_SRAM_USR_WCMD_W<'_, 28>
pub fn cache_sram_usr_wcmd(&mut self) -> CACHE_SRAM_USR_WCMD_W<'_, 28>
Bit 28 - For SPI0 In the spi sram mode cache write sram for user define command