Struct esp32::spi0::ext3::R

pub struct R(_);

Register EXT3 reader

Implementations

impl R

pub fn int_hold_ena(&self) -> INT_HOLD_ENA_R

Bits 0:1 - This register is for two SPI masters to share the same cs clock and data signals. The bits of one SPI are set if the other SPI is busy the SPI will be hold. 1(3): hold at ¡°idle¡± phase 2: hold at ¡°prepare¡± phase.

Methods from Deref<Target = R<EXT3_SPEC>>

pub fn bits(&self) -> REG::Ux

Reads raw bits from register.

Trait Implementations

impl Deref for R

type Target = R<EXT3_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl From<R<EXT3_SPEC>> for R

fn from(reader: R<EXT3_SPEC>) -> Self

Converts to this type from the input type.