[−][src]Struct esp32::slc::RegisterBlock
Register block
Fields
conf0: CONF00x00 - SLC_CONF0
_0int_raw: _0INT_RAW0x04 - SLC_0INT_RAW
_0int_st: _0INT_ST0x08 - SLC_0INT_ST
_0int_ena: _0INT_ENA0x0c - SLC_0INT_ENA
_0int_clr: _0INT_CLR0x10 - SLC_0INT_CLR
_1int_raw: _1INT_RAW0x14 - SLC_1INT_RAW
_1int_st: _1INT_ST0x18 - SLC_1INT_ST
_1int_ena: _1INT_ENA0x1c - SLC_1INT_ENA
_1int_clr: _1INT_CLR0x20 - SLC_1INT_CLR
rx_status: RX_STATUS0x24 - SLC_RX_STATUS
_0rxfifo_push: _0RXFIFO_PUSH0x28 - SLC_0RXFIFO_PUSH
_1rxfifo_push: _1RXFIFO_PUSH0x2c - SLC_1RXFIFO_PUSH
tx_status: TX_STATUS0x30 - SLC_TX_STATUS
_0txfifo_pop: _0TXFIFO_POP0x34 - SLC_0TXFIFO_POP
_1txfifo_pop: _1TXFIFO_POP0x38 - SLC_1TXFIFO_POP
_0rx_link: _0RX_LINK0x3c - SLC_0RX_LINK
_0tx_link: _0TX_LINK0x40 - SLC_0TX_LINK
_1rx_link: _1RX_LINK0x44 - SLC_1RX_LINK
_1tx_link: _1TX_LINK0x48 - SLC_1TX_LINK
intvec_tohost: INTVEC_TOHOST0x4c - SLC_INTVEC_TOHOST
_0token0: _0TOKEN00x50 - SLC_0TOKEN0
_0token1: _0TOKEN10x54 - SLC_0TOKEN1
_1token0: _1TOKEN00x58 - SLC_1TOKEN0
_1token1: _1TOKEN10x5c - SLC_1TOKEN1
conf1: CONF10x60 - SLC_CONF1
_0_state0: _0_STATE00x64 - SLC_0_STATE0
_0_state1: _0_STATE10x68 - SLC_0_STATE1
_1_state0: _1_STATE00x6c - SLC_1_STATE0
_1_state1: _1_STATE10x70 - SLC_1_STATE1
bridge_conf: BRIDGE_CONF0x74 - SLC_BRIDGE_CONF
_0_to_eof_des_addr: _0_TO_EOF_DES_ADDR0x78 - SLC_0_TO_EOF_DES_ADDR
_0_tx_eof_des_addr: _0_TX_EOF_DES_ADDR0x7c - SLC_0_TX_EOF_DES_ADDR
_0_to_eof_bfr_des_addr: _0_TO_EOF_BFR_DES_ADDR0x80 - SLC_0_TO_EOF_BFR_DES_ADDR
_1_to_eof_des_addr: _1_TO_EOF_DES_ADDR0x84 - SLC_1_TO_EOF_DES_ADDR
_1_tx_eof_des_addr: _1_TX_EOF_DES_ADDR0x88 - SLC_1_TX_EOF_DES_ADDR
_1_to_eof_bfr_des_addr: _1_TO_EOF_BFR_DES_ADDR0x8c - SLC_1_TO_EOF_BFR_DES_ADDR
ahb_test: AHB_TEST0x90 - SLC_AHB_TEST
sdio_st: SDIO_ST0x94 - SLC_SDIO_ST
rx_dscr_conf: RX_DSCR_CONF0x98 - SLC_RX_DSCR_CONF
_0_txlink_dscr: _0_TXLINK_DSCR0x9c - SLC_0_TXLINK_DSCR
_0_txlink_dscr_bf0: _0_TXLINK_DSCR_BF00xa0 - SLC_0_TXLINK_DSCR_BF0
_0_txlink_dscr_bf1: _0_TXLINK_DSCR_BF10xa4 - SLC_0_TXLINK_DSCR_BF1
_0_rxlink_dscr: _0_RXLINK_DSCR0xa8 - SLC_0_RXLINK_DSCR
_0_rxlink_dscr_bf0: _0_RXLINK_DSCR_BF00xac - SLC_0_RXLINK_DSCR_BF0
_0_rxlink_dscr_bf1: _0_RXLINK_DSCR_BF10xb0 - SLC_0_RXLINK_DSCR_BF1
_1_txlink_dscr: _1_TXLINK_DSCR0xb4 - SLC_1_TXLINK_DSCR
_1_txlink_dscr_bf0: _1_TXLINK_DSCR_BF00xb8 - SLC_1_TXLINK_DSCR_BF0
_1_txlink_dscr_bf1: _1_TXLINK_DSCR_BF10xbc - SLC_1_TXLINK_DSCR_BF1
_1_rxlink_dscr: _1_RXLINK_DSCR0xc0 - SLC_1_RXLINK_DSCR
_1_rxlink_dscr_bf0: _1_RXLINK_DSCR_BF00xc4 - SLC_1_RXLINK_DSCR_BF0
_1_rxlink_dscr_bf1: _1_RXLINK_DSCR_BF10xc8 - SLC_1_RXLINK_DSCR_BF1
_0_tx_erreof_des_addr: _0_TX_ERREOF_DES_ADDR0xcc - SLC_0_TX_ERREOF_DES_ADDR
_1_tx_erreof_des_addr: _1_TX_ERREOF_DES_ADDR0xd0 - SLC_1_TX_ERREOF_DES_ADDR
token_lat: TOKEN_LAT0xd4 - SLC_TOKEN_LAT
tx_dscr_conf: TX_DSCR_CONF0xd8 - SLC_TX_DSCR_CONF
cmd_infor0: CMD_INFOR00xdc - SLC_CMD_INFOR0
cmd_infor1: CMD_INFOR10xe0 - SLC_CMD_INFOR1
_0_len_conf: _0_LEN_CONF0xe4 - SLC_0_LEN_CONF
_0_length: _0_LENGTH0xe8 - SLC_0_LENGTH
_0_txpkt_h_dscr: _0_TXPKT_H_DSCR0xec - SLC_0_TXPKT_H_DSCR
_0_txpkt_e_dscr: _0_TXPKT_E_DSCR0xf0 - SLC_0_TXPKT_E_DSCR
_0_rxpkt_h_dscr: _0_RXPKT_H_DSCR0xf4 - SLC_0_RXPKT_H_DSCR
_0_rxpkt_e_dscr: _0_RXPKT_E_DSCR0xf8 - SLC_0_RXPKT_E_DSCR
_0_txpktu_h_dscr: _0_TXPKTU_H_DSCR0xfc - SLC_0_TXPKTU_H_DSCR
_0_txpktu_e_dscr: _0_TXPKTU_E_DSCR0x100 - SLC_0_TXPKTU_E_DSCR
_0_rxpktu_h_dscr: _0_RXPKTU_H_DSCR0x104 - SLC_0_RXPKTU_H_DSCR
_0_rxpktu_e_dscr: _0_RXPKTU_E_DSCR0x108 - SLC_0_RXPKTU_E_DSCR
seq_position: SEQ_POSITION0x114 - SLC_SEQ_POSITION
_0_dscr_rec_conf: _0_DSCR_REC_CONF0x118 - SLC_0_DSCR_REC_CONF
sdio_crc_st0: SDIO_CRC_ST00x11c - SLC_SDIO_CRC_ST0
sdio_crc_st1: SDIO_CRC_ST10x120 - SLC_SDIO_CRC_ST1
_0_eof_start_des: _0_EOF_START_DES0x124 - SLC_0_EOF_START_DES
_0_push_dscr_addr: _0_PUSH_DSCR_ADDR0x128 - SLC_0_PUSH_DSCR_ADDR
_0_done_dscr_addr: _0_DONE_DSCR_ADDR0x12c - SLC_0_DONE_DSCR_ADDR
_0_sub_start_des: _0_SUB_START_DES0x130 - SLC_0_SUB_START_DES
_0_dscr_cnt: _0_DSCR_CNT0x134 - SLC_0_DSCR_CNT
_0_len_lim_conf: _0_LEN_LIM_CONF0x138 - SLC_0_LEN_LIM_CONF
_0int_st1: _0INT_ST10x13c - SLC_0INT_ST1
_0int_ena1: _0INT_ENA10x140 - SLC_0INT_ENA1
_1int_st1: _1INT_ST10x144 - SLC_1INT_ST1
_1int_ena1: _1INT_ENA10x148 - SLC_1INT_ENA1
date: DATE0x1f8 - SLC_DATE
id: ID0x1fc - SLC_ID
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