Struct esp32::timg0::wdtconfig0::R
source · pub struct R(_);
Expand description
Register WDTCONFIG0
reader
Implementations§
source§impl R
impl R
sourcepub fn wdt_flashboot_mod_en(&self) -> WDT_FLASHBOOT_MOD_EN_R
pub fn wdt_flashboot_mod_en(&self) -> WDT_FLASHBOOT_MOD_EN_R
Bit 14 - When set flash boot protection is enabled
sourcepub fn wdt_sys_reset_length(&self) -> WDT_SYS_RESET_LENGTH_R
pub fn wdt_sys_reset_length(&self) -> WDT_SYS_RESET_LENGTH_R
Bits 15:17 - length of system reset selection. 0: 100ns 1: 200ns 2: 300ns 3: 400ns 4: 500ns 5: 800ns 6: 1.6us 7: 3.2us
sourcepub fn wdt_cpu_reset_length(&self) -> WDT_CPU_RESET_LENGTH_R
pub fn wdt_cpu_reset_length(&self) -> WDT_CPU_RESET_LENGTH_R
Bits 18:20 - length of CPU reset selection. 0: 100ns 1: 200ns 2: 300ns 3: 400ns 4: 500ns 5: 800ns 6: 1.6us 7: 3.2us
sourcepub fn wdt_level_int_en(&self) -> WDT_LEVEL_INT_EN_R
pub fn wdt_level_int_en(&self) -> WDT_LEVEL_INT_EN_R
Bit 21 - When set level type interrupt generation is enabled
sourcepub fn wdt_edge_int_en(&self) -> WDT_EDGE_INT_EN_R
pub fn wdt_edge_int_en(&self) -> WDT_EDGE_INT_EN_R
Bit 22 - When set edge type interrupt generation is enabled
sourcepub fn wdt_stg3(&self) -> WDT_STG3_R
pub fn wdt_stg3(&self) -> WDT_STG3_R
Bits 23:24 - Stage 3 configuration. 0: off 1: interrupt 2: reset CPU 3: reset system
sourcepub fn wdt_stg2(&self) -> WDT_STG2_R
pub fn wdt_stg2(&self) -> WDT_STG2_R
Bits 25:26 - Stage 2 configuration. 0: off 1: interrupt 2: reset CPU 3: reset system
sourcepub fn wdt_stg1(&self) -> WDT_STG1_R
pub fn wdt_stg1(&self) -> WDT_STG1_R
Bits 27:28 - Stage 1 configuration. 0: off 1: interrupt 2: reset CPU 3: reset system
sourcepub fn wdt_stg0(&self) -> WDT_STG0_R
pub fn wdt_stg0(&self) -> WDT_STG0_R
Bits 29:30 - Stage 0 configuration. 0: off 1: interrupt 2: reset CPU 3: reset system