Struct esp32::ledc::hstimer_conf::R
source · pub struct R(_);
Expand description
Register HSTIMER%s_CONF
reader
Implementations§
source§impl R
impl R
sourcepub fn duty_res(&self) -> DUTY_RES_R
pub fn duty_res(&self) -> DUTY_RES_R
Bits 0:4 - This register controls the range of the counter in high speed timer0. the counter range is [0 2**reg_hstimer0_lim] the max bit width for counter is 20.
sourcepub fn div_num(&self) -> DIV_NUM_R
pub fn div_num(&self) -> DIV_NUM_R
Bits 5:22 - This register is used to configure parameter for divider in high speed timer0 the least significant eight bits represent the decimal part.
sourcepub fn pause(&self) -> PAUSE_R
pub fn pause(&self) -> PAUSE_R
Bit 23 - This bit is used to pause the counter in high speed timer0
sourcepub fn rst(&self) -> RST_R
pub fn rst(&self) -> RST_R
Bit 24 - This bit is used to reset high speed timer0 the counter will be 0 after reset.
sourcepub fn tick_sel(&self) -> TICK_SEL_R
pub fn tick_sel(&self) -> TICK_SEL_R
Bit 25 - This bit is used to choose apb_clk or ref_tick for high speed timer0. 1’b1:apb_clk 0:ref_tick