pub struct W(_);Expand description
Register EXT3 writer
Implementations§
source§impl W
 
impl W
sourcepub fn int_hold_ena(&mut self) -> INT_HOLD_ENA_W<'_, 0>
 
pub fn int_hold_ena(&mut self) -> INT_HOLD_ENA_W<'_, 0>
Bits 0:1 - This register is for two SPI masters to share the same cs clock and data signals. The bits of one SPI are set if the other SPI is busy the SPI will be hold. 1(3): hold at ¡°idle¡± phase 2: hold at ¡°prepare¡± phase.