Struct esp32::spi0::sram_drd_cmd::W
source · pub struct W(_);
Expand description
Register SRAM_DRD_CMD
writer
Implementations§
source§impl W
impl W
sourcepub fn cache_sram_usr_rd_cmd_value(
&mut self
) -> CACHE_SRAM_USR_RD_CMD_VALUE_W<'_, 0>
pub fn cache_sram_usr_rd_cmd_value(
&mut self
) -> CACHE_SRAM_USR_RD_CMD_VALUE_W<'_, 0>
Bits 0:15 - For SPI0 When cache mode is enable it is the read command value of command phase for SRAM.
sourcepub fn cache_sram_usr_rd_cmd_bitlen(
&mut self
) -> CACHE_SRAM_USR_RD_CMD_BITLEN_W<'_, 28>
pub fn cache_sram_usr_rd_cmd_bitlen(
&mut self
) -> CACHE_SRAM_USR_RD_CMD_BITLEN_W<'_, 28>
Bits 28:31 - For SPI0 When cache mode is enable it is the length in bits of command phase for SRAM. The register value shall be (bit_num-1).