pub struct W(_);
Expand description
Register CLK_CONF
writer
Implementations§
source§impl W
impl W
sourcepub fn ck8m_div(&mut self) -> CK8M_DIV_W<'_, 4>
pub fn ck8m_div(&mut self) -> CK8M_DIV_W<'_, 4>
Bits 4:5 - CK8M_D256_OUT divider. 00: div128 01: div256 10: div512 11: div1024.
sourcepub fn enb_ck8m(&mut self) -> ENB_CK8M_W<'_, 6>
pub fn enb_ck8m(&mut self) -> ENB_CK8M_W<'_, 6>
Bit 6 - disable CK8M and CK8M_D256_OUT
sourcepub fn enb_ck8m_div(&mut self) -> ENB_CK8M_DIV_W<'_, 7>
pub fn enb_ck8m_div(&mut self) -> ENB_CK8M_DIV_W<'_, 7>
Bit 7 - 1: CK8M_D256_OUT is actually CK8M 0: CK8M_D256_OUT is CK8M divided by 256
sourcepub fn dig_xtal32k_en(&mut self) -> DIG_XTAL32K_EN_W<'_, 8>
pub fn dig_xtal32k_en(&mut self) -> DIG_XTAL32K_EN_W<'_, 8>
Bit 8 - enable CK_XTAL_32K for digital core (no relationship with RTC core)
sourcepub fn dig_clk8m_d256_en(&mut self) -> DIG_CLK8M_D256_EN_W<'_, 9>
pub fn dig_clk8m_d256_en(&mut self) -> DIG_CLK8M_D256_EN_W<'_, 9>
Bit 9 - enable CK8M_D256_OUT for digital core (no relationship with RTC core)
sourcepub fn dig_clk8m_en(&mut self) -> DIG_CLK8M_EN_W<'_, 10>
pub fn dig_clk8m_en(&mut self) -> DIG_CLK8M_EN_W<'_, 10>
Bit 10 - enable CK8M for digital core (no relationship with RTC core)
sourcepub fn ck8m_dfreq_force(&mut self) -> CK8M_DFREQ_FORCE_W<'_, 11>
pub fn ck8m_dfreq_force(&mut self) -> CK8M_DFREQ_FORCE_W<'_, 11>
Bit 11
sourcepub fn ck8m_div_sel(&mut self) -> CK8M_DIV_SEL_W<'_, 12>
pub fn ck8m_div_sel(&mut self) -> CK8M_DIV_SEL_W<'_, 12>
Bits 12:14 - divider = reg_ck8m_div_sel + 1
sourcepub fn xtal_force_nogating(&mut self) -> XTAL_FORCE_NOGATING_W<'_, 15>
pub fn xtal_force_nogating(&mut self) -> XTAL_FORCE_NOGATING_W<'_, 15>
Bit 15 - XTAL force no gating during sleep
sourcepub fn ck8m_force_nogating(&mut self) -> CK8M_FORCE_NOGATING_W<'_, 16>
pub fn ck8m_force_nogating(&mut self) -> CK8M_FORCE_NOGATING_W<'_, 16>
Bit 16 - CK8M force no gating during sleep
sourcepub fn ck8m_dfreq(&mut self) -> CK8M_DFREQ_W<'_, 17>
pub fn ck8m_dfreq(&mut self) -> CK8M_DFREQ_W<'_, 17>
Bits 17:24 - CK8M_DFREQ
sourcepub fn ck8m_force_pd(&mut self) -> CK8M_FORCE_PD_W<'_, 25>
pub fn ck8m_force_pd(&mut self) -> CK8M_FORCE_PD_W<'_, 25>
Bit 25 - CK8M force power down
sourcepub fn ck8m_force_pu(&mut self) -> CK8M_FORCE_PU_W<'_, 26>
pub fn ck8m_force_pu(&mut self) -> CK8M_FORCE_PU_W<'_, 26>
Bit 26 - CK8M force power up
sourcepub fn soc_clk_sel(&mut self) -> SOC_CLK_SEL_W<'_, 27>
pub fn soc_clk_sel(&mut self) -> SOC_CLK_SEL_W<'_, 27>
Bits 27:28 - SOC clock sel. 0: XTAL 1: PLL 2: CK8M 3: APLL
sourcepub fn fast_clk_rtc_sel(&mut self) -> FAST_CLK_RTC_SEL_W<'_, 29>
pub fn fast_clk_rtc_sel(&mut self) -> FAST_CLK_RTC_SEL_W<'_, 29>
Bit 29 - fast_clk_rtc sel. 0: XTAL div 4 1: CK8M
sourcepub fn ana_clk_rtc_sel(&mut self) -> ANA_CLK_RTC_SEL_W<'_, 30>
pub fn ana_clk_rtc_sel(&mut self) -> ANA_CLK_RTC_SEL_W<'_, 30>
Bits 30:31 - slow_clk_rtc sel. 0: SLOW_CK 1: CK_XTAL_32K 2: CK8M_D256_OUT