Struct esp32::efuse::blk0_rdata3::W   
source · pub struct W(_);Expand description
Register BLK0_RDATA3 writer
Implementations§
source§impl W
 
impl W
sourcepub fn rd_chip_ver_pkg(&mut self) -> RD_CHIP_VER_PKG_W<'_, 9>
 
pub fn rd_chip_ver_pkg(&mut self) -> RD_CHIP_VER_PKG_W<'_, 9>
Bits 9:11 - least significant bits of chip package
sourcepub fn rd_chip_cpu_freq_low(&mut self) -> RD_CHIP_CPU_FREQ_LOW_W<'_, 12>
 
pub fn rd_chip_cpu_freq_low(&mut self) -> RD_CHIP_CPU_FREQ_LOW_W<'_, 12>
Bit 12 - If set alongside EFUSE_RD_CHIP_CPU_FREQ_RATED, the ESP32’s max CPU frequency is rated for 160MHz. 240MHz otherwise
sourcepub fn rd_chip_cpu_freq_rated(&mut self) -> RD_CHIP_CPU_FREQ_RATED_W<'_, 13>
 
pub fn rd_chip_cpu_freq_rated(&mut self) -> RD_CHIP_CPU_FREQ_RATED_W<'_, 13>
Bit 13 - If set, the ESP32’s maximum CPU frequency has been rated
sourcepub fn rd_blk3_part_reserve(&mut self) -> RD_BLK3_PART_RESERVE_W<'_, 14>
 
pub fn rd_blk3_part_reserve(&mut self) -> RD_BLK3_PART_RESERVE_W<'_, 14>
Bit 14 - If set, this bit indicates that BLOCK3[143:96] is reserved for internal use
sourcepub fn rd_chip_ver_rev1(&mut self) -> RD_CHIP_VER_REV1_W<'_, 15>
 
pub fn rd_chip_ver_rev1(&mut self) -> RD_CHIP_VER_REV1_W<'_, 15>
Bit 15 - bit is set to 1 for rev1 silicon