Struct esp32::spi0::slave::R

source ·
pub struct R(_);
Expand description

Register SLAVE reader

Implementations

Bit 0 - The interrupt raw bit for the completion of read-buffer operation in the slave mode.

Bit 1 - The interrupt raw bit for the completion of write-buffer operation in the slave mode.

Bit 2 - The interrupt raw bit for the completion of read-status operation in the slave mode.

Bit 3 - The interrupt raw bit for the completion of write-status operation in the slave mode.

Bit 4 - The interrupt raw bit for the completion of any operation in both the master mode and the slave mode.

Bits 5:9 - Interrupt enable bits for the below 5 sources

Bits 10:11 - In the slave mode this bits used to synchronize the input spi cs signal and eliminate spi cs jitter.

Bits 17:19 - In the slave mode it is the value of command.

Bits 20:22 - In the slave mode it is the state of spi state machine.

Bits 23:26 - The operations counter in both the master mode and the slave mode. 4: read-status

Bit 27 - 1: slave mode commands are defined in SPI_SLAVE3. 0: slave mode commands are fixed as: 1: write-status 2: write-buffer and 3: read-buffer.

Bit 28 - write and read status enable in the slave mode

Bit 29 - write and read buffer enable in the slave mode

Bit 30 - 1: slave mode 0: master mode.

Bit 31 - Software reset enable, reset the spi clock line cs line and data lines.

Methods from Deref<Target = R<SLAVE_SPEC>>

Reads raw bits from register.

Trait Implementations

The resulting type after dereferencing.
Dereferences the value.
Converts to this type from the input type.

Auto Trait Implementations

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The type returned in the event of a conversion error.
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The type returned in the event of a conversion error.
Performs the conversion.