1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164

#[doc = "Register `INT_ENA` reader"]
pub struct R(crate::R<INT_ENA_SPEC>);
impl core::ops::Deref for R {
    type Target = crate::R<INT_ENA_SPEC>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
impl From<crate::R<INT_ENA_SPEC>> for R {
    #[inline(always)]
    fn from(reader: crate::R<INT_ENA_SPEC>) -> Self {
        R(reader)
    }
}
#[doc = "Register `INT_ENA` writer"]
pub struct W(crate::W<INT_ENA_SPEC>);
impl core::ops::Deref for W {
    type Target = crate::W<INT_ENA_SPEC>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
impl core::ops::DerefMut for W {
    #[inline(always)]
    fn deref_mut(&mut self) -> &mut Self::Target {
        &mut self.0
    }
}
impl From<crate::W<INT_ENA_SPEC>> for W {
    #[inline(always)]
    fn from(writer: crate::W<INT_ENA_SPEC>) -> Self {
        W(writer)
    }
}
#[doc = "Field `RX_INT_ENA` reader - Set this bit to 1 to enable receive interrupt."]
pub type RX_INT_ENA_R = crate::BitReader<bool>;
#[doc = "Field `RX_INT_ENA` writer - Set this bit to 1 to enable receive interrupt."]
pub type RX_INT_ENA_W<'a, const O: u8> = crate::BitWriter<'a, u32, INT_ENA_SPEC, bool, O>;
#[doc = "Field `TX_INT_ENA` reader - Set this bit to 1 to enable transmit interrupt."]
pub type TX_INT_ENA_R = crate::BitReader<bool>;
#[doc = "Field `TX_INT_ENA` writer - Set this bit to 1 to enable transmit interrupt."]
pub type TX_INT_ENA_W<'a, const O: u8> = crate::BitWriter<'a, u32, INT_ENA_SPEC, bool, O>;
#[doc = "Field `ERR_WARN_INT_ENA` reader - Set this bit to 1 to enable error warning interrupt."]
pub type ERR_WARN_INT_ENA_R = crate::BitReader<bool>;
#[doc = "Field `ERR_WARN_INT_ENA` writer - Set this bit to 1 to enable error warning interrupt."]
pub type ERR_WARN_INT_ENA_W<'a, const O: u8> = crate::BitWriter<'a, u32, INT_ENA_SPEC, bool, O>;
#[doc = "Field `OVERRUN_INT_ENA` reader - Set this bit to 1 to enable data overrun interrupt."]
pub type OVERRUN_INT_ENA_R = crate::BitReader<bool>;
#[doc = "Field `OVERRUN_INT_ENA` writer - Set this bit to 1 to enable data overrun interrupt."]
pub type OVERRUN_INT_ENA_W<'a, const O: u8> = crate::BitWriter<'a, u32, INT_ENA_SPEC, bool, O>;
#[doc = "Field `ERR_PASSIVE_INT_ENA` reader - Set this bit to 1 to enable error passive interrupt."]
pub type ERR_PASSIVE_INT_ENA_R = crate::BitReader<bool>;
#[doc = "Field `ERR_PASSIVE_INT_ENA` writer - Set this bit to 1 to enable error passive interrupt."]
pub type ERR_PASSIVE_INT_ENA_W<'a, const O: u8> = crate::BitWriter<'a, u32, INT_ENA_SPEC, bool, O>;
#[doc = "Field `ARB_LOST_INT_ENA` reader - Set this bit to 1 to enable arbitration lost interrupt."]
pub type ARB_LOST_INT_ENA_R = crate::BitReader<bool>;
#[doc = "Field `ARB_LOST_INT_ENA` writer - Set this bit to 1 to enable arbitration lost interrupt."]
pub type ARB_LOST_INT_ENA_W<'a, const O: u8> = crate::BitWriter<'a, u32, INT_ENA_SPEC, bool, O>;
#[doc = "Field `BUS_ERR_INT_ENA` reader - Set this bit to 1 to enable error interrupt."]
pub type BUS_ERR_INT_ENA_R = crate::BitReader<bool>;
#[doc = "Field `BUS_ERR_INT_ENA` writer - Set this bit to 1 to enable error interrupt."]
pub type BUS_ERR_INT_ENA_W<'a, const O: u8> = crate::BitWriter<'a, u32, INT_ENA_SPEC, bool, O>;
impl R {
    #[doc = "Bit 0 - Set this bit to 1 to enable receive interrupt."]
    #[inline(always)]
    pub fn rx_int_ena(&self) -> RX_INT_ENA_R {
        RX_INT_ENA_R::new((self.bits & 1) != 0)
    }
    #[doc = "Bit 1 - Set this bit to 1 to enable transmit interrupt."]
    #[inline(always)]
    pub fn tx_int_ena(&self) -> TX_INT_ENA_R {
        TX_INT_ENA_R::new(((self.bits >> 1) & 1) != 0)
    }
    #[doc = "Bit 2 - Set this bit to 1 to enable error warning interrupt."]
    #[inline(always)]
    pub fn err_warn_int_ena(&self) -> ERR_WARN_INT_ENA_R {
        ERR_WARN_INT_ENA_R::new(((self.bits >> 2) & 1) != 0)
    }
    #[doc = "Bit 3 - Set this bit to 1 to enable data overrun interrupt."]
    #[inline(always)]
    pub fn overrun_int_ena(&self) -> OVERRUN_INT_ENA_R {
        OVERRUN_INT_ENA_R::new(((self.bits >> 3) & 1) != 0)
    }
    #[doc = "Bit 5 - Set this bit to 1 to enable error passive interrupt."]
    #[inline(always)]
    pub fn err_passive_int_ena(&self) -> ERR_PASSIVE_INT_ENA_R {
        ERR_PASSIVE_INT_ENA_R::new(((self.bits >> 5) & 1) != 0)
    }
    #[doc = "Bit 6 - Set this bit to 1 to enable arbitration lost interrupt."]
    #[inline(always)]
    pub fn arb_lost_int_ena(&self) -> ARB_LOST_INT_ENA_R {
        ARB_LOST_INT_ENA_R::new(((self.bits >> 6) & 1) != 0)
    }
    #[doc = "Bit 7 - Set this bit to 1 to enable error interrupt."]
    #[inline(always)]
    pub fn bus_err_int_ena(&self) -> BUS_ERR_INT_ENA_R {
        BUS_ERR_INT_ENA_R::new(((self.bits >> 7) & 1) != 0)
    }
}
impl W {
    #[doc = "Bit 0 - Set this bit to 1 to enable receive interrupt."]
    #[inline(always)]
    pub fn rx_int_ena(&mut self) -> RX_INT_ENA_W<0> {
        RX_INT_ENA_W::new(self)
    }
    #[doc = "Bit 1 - Set this bit to 1 to enable transmit interrupt."]
    #[inline(always)]
    pub fn tx_int_ena(&mut self) -> TX_INT_ENA_W<1> {
        TX_INT_ENA_W::new(self)
    }
    #[doc = "Bit 2 - Set this bit to 1 to enable error warning interrupt."]
    #[inline(always)]
    pub fn err_warn_int_ena(&mut self) -> ERR_WARN_INT_ENA_W<2> {
        ERR_WARN_INT_ENA_W::new(self)
    }
    #[doc = "Bit 3 - Set this bit to 1 to enable data overrun interrupt."]
    #[inline(always)]
    pub fn overrun_int_ena(&mut self) -> OVERRUN_INT_ENA_W<3> {
        OVERRUN_INT_ENA_W::new(self)
    }
    #[doc = "Bit 5 - Set this bit to 1 to enable error passive interrupt."]
    #[inline(always)]
    pub fn err_passive_int_ena(&mut self) -> ERR_PASSIVE_INT_ENA_W<5> {
        ERR_PASSIVE_INT_ENA_W::new(self)
    }
    #[doc = "Bit 6 - Set this bit to 1 to enable arbitration lost interrupt."]
    #[inline(always)]
    pub fn arb_lost_int_ena(&mut self) -> ARB_LOST_INT_ENA_W<6> {
        ARB_LOST_INT_ENA_W::new(self)
    }
    #[doc = "Bit 7 - Set this bit to 1 to enable error interrupt."]
    #[inline(always)]
    pub fn bus_err_int_ena(&mut self) -> BUS_ERR_INT_ENA_W<7> {
        BUS_ERR_INT_ENA_W::new(self)
    }
    #[doc = "Writes raw bits to the register."]
    #[inline(always)]
    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
        self.0.bits(bits);
        self
    }
}
#[doc = "Interrupt Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [int_ena](index.html) module"]
pub struct INT_ENA_SPEC;
impl crate::RegisterSpec for INT_ENA_SPEC {
    type Ux = u32;
}
#[doc = "`read()` method returns [int_ena::R](R) reader structure"]
impl crate::Readable for INT_ENA_SPEC {
    type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [int_ena::W](W) writer structure"]
impl crate::Writable for INT_ENA_SPEC {
    type Writer = W;
}
#[doc = "`reset()` method sets INT_ENA to value 0"]
impl crate::Resettable for INT_ENA_SPEC {
    #[inline(always)]
    fn reset_value() -> Self::Ux {
        0
    }
}