Struct esp32::spi0::user::W

source · []
pub struct W(_);
Expand description

Register USER writer

Implementations

Bit 0 - Set the bit to enable full duplex communication. 1: enable 0: disable.

Bit 4 - spi cs keep low when spi is in ¡°done¡± phase. 1: enable 0: disable.

Bit 5 - spi cs is enable when spi is in ¡°prepare¡± phase. 1: enable 0: disable.

Bit 6 - In the slave mode the bit is same as spi_ck_out_edge in master mode. It is combined with spi_miso_delay_mode bits.

Bit 7 - the bit combined with spi_mosi_delay_mode bits to set mosi signal delay mode.

Bit 10 - In read-data (MISO) phase 1: big-endian 0: little_endian

Bit 11 - In command address write-data (MOSI) phases 1: big-endian 0: litte_endian

Bit 12 - In the write operations read-data phase apply 2 signals

Bit 13 - In the write operations read-data phase apply 4 signals

Bit 14 - In the write operations address phase and read-data phase apply 2 signals.

Bit 15 - In the write operations address phase and read-data phase apply 4 signals.

Bit 16 - Set the bit to enable 3-line half duplex communication mosi and miso signals share the same pin. 1: enable 0: disable.

Bit 17 - It is combined with hold bits to set the polarity of spi hold line 1: spi will be held when spi hold line is high 0: spi will be held when spi hold line is low

Bit 18 - spi is hold at data out state the bit combined with spi_usr_hold_pol bit.

Bit 19 - spi is hold at data in state the bit combined with spi_usr_hold_pol bit.

Bit 20 - spi is hold at dummy state the bit combined with spi_usr_hold_pol bit.

Bit 21 - spi is hold at address state the bit combined with spi_usr_hold_pol bit.

Bit 22 - spi is hold at command state the bit combined with spi_usr_hold_pol bit.

Bit 23 - spi is hold at prepare state the bit combined with spi_usr_hold_pol bit.

Bit 24 - read-data phase only access to high-part of the buffer spi_w8~spi_w15. 1: enable 0: disable.

Bit 25 - write-data phase only access to high-part of the buffer spi_w8~spi_w15. 1: enable 0: disable.

Bit 26 - spi clock is disable in dummy phase when the bit is enable.

Bit 27 - This bit enable the write-data phase of an operation.

Bit 28 - This bit enable the read-data phase of an operation.

Bit 29 - This bit enable the dummy phase of an operation.

Bit 30 - This bit enable the address phase of an operation.

Bit 31 - This bit enable the command phase of an operation.

Writes raw bits to the register.

Methods from Deref<Target = W<USER_SPEC>>

Writes raw bits to the register.

Safety

Read datasheet or reference manual to find what values are allowed to pass.

Trait Implementations

The resulting type after dereferencing.
Dereferences the value.
Mutably dereferences the value.
Converts to this type from the input type.

Auto Trait Implementations

Blanket Implementations

Gets the TypeId of self. Read more
Immutably borrows from an owned value. Read more
Mutably borrows from an owned value. Read more

Returns the argument unchanged.

Calls U::from(self).

That is, this conversion is whatever the implementation of From<T> for U chooses to do.

The type returned in the event of a conversion error.
Performs the conversion.
The type returned in the event of a conversion error.
Performs the conversion.