Struct esp32::pcnt::u5_conf0::W

pub struct W(_);

Register U5_CONF0 writer

Implementations

impl W

pub fn filter_thres_u5(&mut self) -> FILTER_THRES_U5_W<'_, 0>

Bits 0:9 - This register is used to filter pluse whose width is smaller than this value for unit5.

pub fn filter_en_u5(&mut self) -> FILTER_EN_U5_W<'_, 10>

Bit 10 - This is the enable bit for filtering input signals for unit5.

pub fn thr_zero_en_u5(&mut self) -> THR_ZERO_EN_U5_W<'_, 11>

Bit 11 - This is the enable bit for comparing unit5’s count with 0 value.

pub fn thr_h_lim_en_u5(&mut self) -> THR_H_LIM_EN_U5_W<'_, 12>

Bit 12 - This is the enable bit for comparing unit5’s count with thr_h_lim value.

pub fn thr_l_lim_en_u5(&mut self) -> THR_L_LIM_EN_U5_W<'_, 13>

Bit 13 - This is the enable bit for comparing unit5’s count with thr_l_lim value.

pub fn thr_thres0_en_u5(&mut self) -> THR_THRES0_EN_U5_W<'_, 14>

Bit 14 - This is the enable bit for comparing unit5’s count with thres0 value.

pub fn thr_thres1_en_u5(&mut self) -> THR_THRES1_EN_U5_W<'_, 15>

Bit 15 - This is the enable bit for comparing unit5’s count with thres1 value .

pub fn ch0_neg_mode_u5(&mut self) -> CH0_NEG_MODE_U5_W<'_, 16>

Bits 16:17 - This register is used to control the mode of channel0’s input negedge signal for unit5. 2’d1: increase at the negedge of input signal 2’d2:decrease at the negedge of input signal others:forbidden

pub fn ch0_pos_mode_u5(&mut self) -> CH0_POS_MODE_U5_W<'_, 18>

Bits 18:19 - This register is used to control the mode of channel0’s input posedge signal for unit5. 2’d1: increase at the posedge of input signal 2’d2:decrease at the posedge of input signal others:forbidden

pub fn ch0_hctrl_mode_u5(&mut self) -> CH0_HCTRL_MODE_U5_W<'_, 20>

Bits 20:21 - This register is used to control the mode of channel0’s high control signal for unit5. 2’d0:increase when control signal is low 2’d1: decrease when control signal is high others:forbidden

pub fn ch0_lctrl_mode_u5(&mut self) -> CH0_LCTRL_MODE_U5_W<'_, 22>

Bits 22:23 - This register is used to control the mode of channel0’s low control signal for unit5. 2’d0:increase when control signal is low 2’d1: decrease when control signal is high others:forbidden

pub fn ch1_neg_mode_u5(&mut self) -> CH1_NEG_MODE_U5_W<'_, 24>

Bits 24:25 - This register is used to control the mode of channel1’s input negedge signal for unit5. 2’d1: increase at the negedge of input signal 2’d2:decrease at the negedge of input signal others:forbidden

pub fn ch1_pos_mode_u5(&mut self) -> CH1_POS_MODE_U5_W<'_, 26>

Bits 26:27 - This register is used to control the mode of channel1’s input posedge signal for unit5. 2’d1: increase at the posedge of input signal 2’d2:decrease at the posedge of input signal others:forbidden

pub fn ch1_hctrl_mode_u5(&mut self) -> CH1_HCTRL_MODE_U5_W<'_, 28>

Bits 28:29 - This register is used to control the mode of channel1’s high control signal for unit5. 2’d0:increase when control signal is low 2’d1: decrease when control signal is high others:forbidden

pub fn ch1_lctrl_mode_u5(&mut self) -> CH1_LCTRL_MODE_U5_W<'_, 30>

Bits 30:31 - This register is used to control the mode of channel1’s low control signal for unit5. 2’d0:increase when control signal is low 2’d1: decrease when control signal is high others:forbidden

pub unsafe fn bits(&mut self, bits: u32) -> &mut Self

Writes raw bits to the register.

Methods from Deref<Target = W<U5_CONF0_SPEC>>

pub unsafe fn bits(&mut self, bits: REG::Ux) -> &mut Self

Writes raw bits to the register.

Safety

Read datasheet or reference manual to find what values are allowed to pass.

Trait Implementations

impl Deref for W

type Target = W<U5_CONF0_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl DerefMut for W

fn deref_mut(&mut self) -> &mut Self::Target

Mutably dereferences the value.

impl From<W<U5_CONF0_SPEC>> for W

fn from(writer: W<U5_CONF0_SPEC>) -> Self

Converts to this type from the input type.