[−][src]Struct esp32::hinf::RegisterBlock

#[repr(C)]pub struct RegisterBlock {
    pub cfg_data0: Reg<CFG_DATA0_SPEC>,
    pub cfg_data1: Reg<CFG_DATA1_SPEC>,
    pub cfg_data7: Reg<CFG_DATA7_SPEC>,
    pub cis_conf0: Reg<CIS_CONF0_SPEC>,
    pub cis_conf1: Reg<CIS_CONF1_SPEC>,
    pub cis_conf2: Reg<CIS_CONF2_SPEC>,
    pub cis_conf3: Reg<CIS_CONF3_SPEC>,
    pub cis_conf4: Reg<CIS_CONF4_SPEC>,
    pub cis_conf5: Reg<CIS_CONF5_SPEC>,
    pub cis_conf6: Reg<CIS_CONF6_SPEC>,
    pub cis_conf7: Reg<CIS_CONF7_SPEC>,
    pub cfg_data16: Reg<CFG_DATA16_SPEC>,
    pub date: Reg<DATE_SPEC>,
    // some fields omitted
}

Register block

Fields

cfg_data0: Reg<CFG_DATA0_SPEC>

0x00 - HINF_CFG_DATA0

cfg_data1: Reg<CFG_DATA1_SPEC>

0x04 - HINF_CFG_DATA1

cfg_data7: Reg<CFG_DATA7_SPEC>

0x1c - HINF_CFG_DATA7

cis_conf0: Reg<CIS_CONF0_SPEC>

0x20 - HINF_CIS_CONF0

cis_conf1: Reg<CIS_CONF1_SPEC>

0x24 - HINF_CIS_CONF1

cis_conf2: Reg<CIS_CONF2_SPEC>

0x28 - HINF_CIS_CONF2

cis_conf3: Reg<CIS_CONF3_SPEC>

0x2c - HINF_CIS_CONF3

cis_conf4: Reg<CIS_CONF4_SPEC>

0x30 - HINF_CIS_CONF4

cis_conf5: Reg<CIS_CONF5_SPEC>

0x34 - HINF_CIS_CONF5

cis_conf6: Reg<CIS_CONF6_SPEC>

0x38 - HINF_CIS_CONF6

cis_conf7: Reg<CIS_CONF7_SPEC>

0x3c - HINF_CIS_CONF7

cfg_data16: Reg<CFG_DATA16_SPEC>

0x40 - HINF_CFG_DATA16

date: Reg<DATE_SPEC>

0xfc - HINF_DATE

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