1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156
#[doc = "Reader of register LEDC_HSCH4_CONF1_REG"] pub type R = crate::R<u32, super::LEDC_HSCH4_CONF1_REG>; #[doc = "Writer for register LEDC_HSCH4_CONF1_REG"] pub type W = crate::W<u32, super::LEDC_HSCH4_CONF1_REG>; #[doc = "Register LEDC_HSCH4_CONF1_REG `reset()`'s with value 0"] impl crate::ResetValue for super::LEDC_HSCH4_CONF1_REG { type Type = u32; #[inline(always)] fn reset_value() -> Self::Type { 0 } } #[doc = "Reader of field `LEDC_DUTY_START_HSCH4`"] pub type LEDC_DUTY_START_HSCH4_R = crate::R<bool, bool>; #[doc = "Write proxy for field `LEDC_DUTY_START_HSCH4`"] pub struct LEDC_DUTY_START_HSCH4_W<'a> { w: &'a mut W, } impl<'a> LEDC_DUTY_START_HSCH4_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 31)) | (((value as u32) & 0x01) << 31); self.w } } #[doc = "Reader of field `LEDC_DUTY_INC_HSCH4`"] pub type LEDC_DUTY_INC_HSCH4_R = crate::R<bool, bool>; #[doc = "Write proxy for field `LEDC_DUTY_INC_HSCH4`"] pub struct LEDC_DUTY_INC_HSCH4_W<'a> { w: &'a mut W, } impl<'a> LEDC_DUTY_INC_HSCH4_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 30)) | (((value as u32) & 0x01) << 30); self.w } } #[doc = "Reader of field `LEDC_DUTY_NUM_HSCH4`"] pub type LEDC_DUTY_NUM_HSCH4_R = crate::R<u16, u16>; #[doc = "Write proxy for field `LEDC_DUTY_NUM_HSCH4`"] pub struct LEDC_DUTY_NUM_HSCH4_W<'a> { w: &'a mut W, } impl<'a> LEDC_DUTY_NUM_HSCH4_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03ff << 20)) | (((value as u32) & 0x03ff) << 20); self.w } } #[doc = "Reader of field `LEDC_DUTY_CYCLE_HSCH4`"] pub type LEDC_DUTY_CYCLE_HSCH4_R = crate::R<u16, u16>; #[doc = "Write proxy for field `LEDC_DUTY_CYCLE_HSCH4`"] pub struct LEDC_DUTY_CYCLE_HSCH4_W<'a> { w: &'a mut W, } impl<'a> LEDC_DUTY_CYCLE_HSCH4_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03ff << 10)) | (((value as u32) & 0x03ff) << 10); self.w } } #[doc = "Reader of field `LEDC_DUTY_SCALE_HSCH4`"] pub type LEDC_DUTY_SCALE_HSCH4_R = crate::R<u16, u16>; #[doc = "Write proxy for field `LEDC_DUTY_SCALE_HSCH4`"] pub struct LEDC_DUTY_SCALE_HSCH4_W<'a> { w: &'a mut W, } impl<'a> LEDC_DUTY_SCALE_HSCH4_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0x03ff) | ((value as u32) & 0x03ff); self.w } } impl R { #[doc = "Bit 31 - When reg_duty_num_hsch1 reg_duty_cycle_hsch1 and reg_duty_scale_hsch1 has been configured. these register won't take effect until set reg_duty_start_hsch1. this bit is automatically cleared by hardware."] #[inline(always)] pub fn ledc_duty_start_hsch4(&self) -> LEDC_DUTY_START_HSCH4_R { LEDC_DUTY_START_HSCH4_R::new(((self.bits >> 31) & 0x01) != 0) } #[doc = "Bit 30 - This register is used to increase the duty of output signal or decrease the duty of output signal for high speed channel4."] #[inline(always)] pub fn ledc_duty_inc_hsch4(&self) -> LEDC_DUTY_INC_HSCH4_R { LEDC_DUTY_INC_HSCH4_R::new(((self.bits >> 30) & 0x01) != 0) } #[doc = "Bits 20:29 - This register is used to control the num of increased or decreased times for high speed channel1."] #[inline(always)] pub fn ledc_duty_num_hsch4(&self) -> LEDC_DUTY_NUM_HSCH4_R { LEDC_DUTY_NUM_HSCH4_R::new(((self.bits >> 20) & 0x03ff) as u16) } #[doc = "Bits 10:19 - This register is used to increase or decrease the duty every reg_duty_cycle_hsch4 cycles for high speed channel4."] #[inline(always)] pub fn ledc_duty_cycle_hsch4(&self) -> LEDC_DUTY_CYCLE_HSCH4_R { LEDC_DUTY_CYCLE_HSCH4_R::new(((self.bits >> 10) & 0x03ff) as u16) } #[doc = "Bits 0:9 - This register controls the increase or decrease step scale for high speed channel4."] #[inline(always)] pub fn ledc_duty_scale_hsch4(&self) -> LEDC_DUTY_SCALE_HSCH4_R { LEDC_DUTY_SCALE_HSCH4_R::new((self.bits & 0x03ff) as u16) } } impl W { #[doc = "Bit 31 - When reg_duty_num_hsch1 reg_duty_cycle_hsch1 and reg_duty_scale_hsch1 has been configured. these register won't take effect until set reg_duty_start_hsch1. this bit is automatically cleared by hardware."] #[inline(always)] pub fn ledc_duty_start_hsch4(&mut self) -> LEDC_DUTY_START_HSCH4_W { LEDC_DUTY_START_HSCH4_W { w: self } } #[doc = "Bit 30 - This register is used to increase the duty of output signal or decrease the duty of output signal for high speed channel4."] #[inline(always)] pub fn ledc_duty_inc_hsch4(&mut self) -> LEDC_DUTY_INC_HSCH4_W { LEDC_DUTY_INC_HSCH4_W { w: self } } #[doc = "Bits 20:29 - This register is used to control the num of increased or decreased times for high speed channel1."] #[inline(always)] pub fn ledc_duty_num_hsch4(&mut self) -> LEDC_DUTY_NUM_HSCH4_W { LEDC_DUTY_NUM_HSCH4_W { w: self } } #[doc = "Bits 10:19 - This register is used to increase or decrease the duty every reg_duty_cycle_hsch4 cycles for high speed channel4."] #[inline(always)] pub fn ledc_duty_cycle_hsch4(&mut self) -> LEDC_DUTY_CYCLE_HSCH4_W { LEDC_DUTY_CYCLE_HSCH4_W { w: self } } #[doc = "Bits 0:9 - This register controls the increase or decrease step scale for high speed channel4."] #[inline(always)] pub fn ledc_duty_scale_hsch4(&mut self) -> LEDC_DUTY_SCALE_HSCH4_W { LEDC_DUTY_SCALE_HSCH4_W { w: self } } }