1
  2
  3
  4
  5
  6
  7
  8
  9
 10
 11
 12
 13
 14
 15
 16
 17
 18
 19
 20
 21
 22
 23
 24
 25
 26
 27
 28
 29
 30
 31
 32
 33
 34
 35
 36
 37
 38
 39
 40
 41
 42
 43
 44
 45
 46
 47
 48
 49
 50
 51
 52
 53
 54
 55
 56
 57
 58
 59
 60
 61
 62
 63
 64
 65
 66
 67
 68
 69
 70
 71
 72
 73
 74
 75
 76
 77
 78
 79
 80
 81
 82
 83
 84
 85
 86
 87
 88
 89
 90
 91
 92
 93
 94
 95
 96
 97
 98
 99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156

#[doc = "Reader of register GPIO_PIN2_REG"]
pub type R = crate::R<u32, super::GPIO_PIN2_REG>;
#[doc = "Writer for register GPIO_PIN2_REG"]
pub type W = crate::W<u32, super::GPIO_PIN2_REG>;
#[doc = "Register GPIO_PIN2_REG `reset()`'s with value 0"]
impl crate::ResetValue for super::GPIO_PIN2_REG {
    type Type = u32;
    #[inline(always)]
    fn reset_value() -> Self::Type {
        0
    }
}
#[doc = "Reader of field `GPIO_PIN2_INT_ENA`"]
pub type GPIO_PIN2_INT_ENA_R = crate::R<u8, u8>;
#[doc = "Write proxy for field `GPIO_PIN2_INT_ENA`"]
pub struct GPIO_PIN2_INT_ENA_W<'a> {
    w: &'a mut W,
}
impl<'a> GPIO_PIN2_INT_ENA_W<'a> {
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub unsafe fn bits(self, value: u8) -> &'a mut W {
        self.w.bits = (self.w.bits & !(0x1f << 13)) | (((value as u32) & 0x1f) << 13);
        self.w
    }
}
#[doc = "Reader of field `GPIO_PIN2_CONFIG`"]
pub type GPIO_PIN2_CONFIG_R = crate::R<u8, u8>;
#[doc = "Write proxy for field `GPIO_PIN2_CONFIG`"]
pub struct GPIO_PIN2_CONFIG_W<'a> {
    w: &'a mut W,
}
impl<'a> GPIO_PIN2_CONFIG_W<'a> {
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub unsafe fn bits(self, value: u8) -> &'a mut W {
        self.w.bits = (self.w.bits & !(0x03 << 11)) | (((value as u32) & 0x03) << 11);
        self.w
    }
}
#[doc = "Reader of field `GPIO_PIN2_WAKEUP_ENABLE`"]
pub type GPIO_PIN2_WAKEUP_ENABLE_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `GPIO_PIN2_WAKEUP_ENABLE`"]
pub struct GPIO_PIN2_WAKEUP_ENABLE_W<'a> {
    w: &'a mut W,
}
impl<'a> GPIO_PIN2_WAKEUP_ENABLE_W<'a> {
    #[doc = r"Sets the field bit"]
    #[inline(always)]
    pub fn set_bit(self) -> &'a mut W {
        self.bit(true)
    }
    #[doc = r"Clears the field bit"]
    #[inline(always)]
    pub fn clear_bit(self) -> &'a mut W {
        self.bit(false)
    }
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub fn bit(self, value: bool) -> &'a mut W {
        self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u32) & 0x01) << 10);
        self.w
    }
}
#[doc = "Reader of field `GPIO_PIN2_INT_TYPE`"]
pub type GPIO_PIN2_INT_TYPE_R = crate::R<u8, u8>;
#[doc = "Write proxy for field `GPIO_PIN2_INT_TYPE`"]
pub struct GPIO_PIN2_INT_TYPE_W<'a> {
    w: &'a mut W,
}
impl<'a> GPIO_PIN2_INT_TYPE_W<'a> {
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub unsafe fn bits(self, value: u8) -> &'a mut W {
        self.w.bits = (self.w.bits & !(0x07 << 7)) | (((value as u32) & 0x07) << 7);
        self.w
    }
}
#[doc = "Reader of field `GPIO_PIN2_PAD_DRIVER`"]
pub type GPIO_PIN2_PAD_DRIVER_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `GPIO_PIN2_PAD_DRIVER`"]
pub struct GPIO_PIN2_PAD_DRIVER_W<'a> {
    w: &'a mut W,
}
impl<'a> GPIO_PIN2_PAD_DRIVER_W<'a> {
    #[doc = r"Sets the field bit"]
    #[inline(always)]
    pub fn set_bit(self) -> &'a mut W {
        self.bit(true)
    }
    #[doc = r"Clears the field bit"]
    #[inline(always)]
    pub fn clear_bit(self) -> &'a mut W {
        self.bit(false)
    }
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub fn bit(self, value: bool) -> &'a mut W {
        self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2);
        self.w
    }
}
impl R {
    #[doc = "Bits 13:17 - bit0: APP CPU interrupt enable bit1: APP CPU non-maskable interrupt enable bit3: PRO CPU interrupt enable bit4: PRO CPU non-maskable interrupt enable bit5: SDIO's extent interrupt enable"]
    #[inline(always)]
    pub fn gpio_pin2_int_ena(&self) -> GPIO_PIN2_INT_ENA_R {
        GPIO_PIN2_INT_ENA_R::new(((self.bits >> 13) & 0x1f) as u8)
    }
    #[doc = "Bits 11:12 - NA"]
    #[inline(always)]
    pub fn gpio_pin2_config(&self) -> GPIO_PIN2_CONFIG_R {
        GPIO_PIN2_CONFIG_R::new(((self.bits >> 11) & 0x03) as u8)
    }
    #[doc = "Bit 10 - GPIO wake up enable only available in light sleep"]
    #[inline(always)]
    pub fn gpio_pin2_wakeup_enable(&self) -> GPIO_PIN2_WAKEUP_ENABLE_R {
        GPIO_PIN2_WAKEUP_ENABLE_R::new(((self.bits >> 10) & 0x01) != 0)
    }
    #[doc = "Bits 7:9 - if set to 0: GPIO interrupt disable if set to 1: rising edge trigger if set to 2: falling edge trigger if set to 3: any edge trigger if set to 4: low level trigger if set to 5: high level trigger"]
    #[inline(always)]
    pub fn gpio_pin2_int_type(&self) -> GPIO_PIN2_INT_TYPE_R {
        GPIO_PIN2_INT_TYPE_R::new(((self.bits >> 7) & 0x07) as u8)
    }
    #[doc = "Bit 2 - if set to 0: normal output if set to 1: open drain"]
    #[inline(always)]
    pub fn gpio_pin2_pad_driver(&self) -> GPIO_PIN2_PAD_DRIVER_R {
        GPIO_PIN2_PAD_DRIVER_R::new(((self.bits >> 2) & 0x01) != 0)
    }
}
impl W {
    #[doc = "Bits 13:17 - bit0: APP CPU interrupt enable bit1: APP CPU non-maskable interrupt enable bit3: PRO CPU interrupt enable bit4: PRO CPU non-maskable interrupt enable bit5: SDIO's extent interrupt enable"]
    #[inline(always)]
    pub fn gpio_pin2_int_ena(&mut self) -> GPIO_PIN2_INT_ENA_W {
        GPIO_PIN2_INT_ENA_W { w: self }
    }
    #[doc = "Bits 11:12 - NA"]
    #[inline(always)]
    pub fn gpio_pin2_config(&mut self) -> GPIO_PIN2_CONFIG_W {
        GPIO_PIN2_CONFIG_W { w: self }
    }
    #[doc = "Bit 10 - GPIO wake up enable only available in light sleep"]
    #[inline(always)]
    pub fn gpio_pin2_wakeup_enable(&mut self) -> GPIO_PIN2_WAKEUP_ENABLE_W {
        GPIO_PIN2_WAKEUP_ENABLE_W { w: self }
    }
    #[doc = "Bits 7:9 - if set to 0: GPIO interrupt disable if set to 1: rising edge trigger if set to 2: falling edge trigger if set to 3: any edge trigger if set to 4: low level trigger if set to 5: high level trigger"]
    #[inline(always)]
    pub fn gpio_pin2_int_type(&mut self) -> GPIO_PIN2_INT_TYPE_W {
        GPIO_PIN2_INT_TYPE_W { w: self }
    }
    #[doc = "Bit 2 - if set to 0: normal output if set to 1: open drain"]
    #[inline(always)]
    pub fn gpio_pin2_pad_driver(&mut self) -> GPIO_PIN2_PAD_DRIVER_W {
        GPIO_PIN2_PAD_DRIVER_W { w: self }
    }
}