[−][src]Type Definition esp32::spi::spi_sram_drd_cmd_reg::R
type R = R<u32, SPI_SRAM_DRD_CMD_REG>;
Reader of register SPI_SRAM_DRD_CMD_REG
Methods
impl R[src]
pub fn spi_cache_sram_usr_rd_cmd_bitlen(
&self
) -> SPI_CACHE_SRAM_USR_RD_CMD_BITLEN_R[src]
&self
) -> SPI_CACHE_SRAM_USR_RD_CMD_BITLEN_R
Bits 28:31 - For SPI0 When cache mode is enable it is the length in bits of command phase for SRAM. The register value shall be (bit_num-1).
pub fn spi_cache_sram_usr_rd_cmd_value(
&self
) -> SPI_CACHE_SRAM_USR_RD_CMD_VALUE_R[src]
&self
) -> SPI_CACHE_SRAM_USR_RD_CMD_VALUE_R
Bits 0:15 - For SPI0 When cache mode is enable it is the read command value of command phase for SRAM.