Type Definition esp32::rtccntl::rtc_cntl_wdtconfig0_reg::W

type W = W<u32, RTC_CNTL_WDTCONFIG0_REG>;

Writer for register RTC_CNTL_WDTCONFIG0_REG

Methods

impl W

pub fn rtc_cntl_wdt_en(&mut self) -> RTC_CNTL_WDT_EN_W

Bit 31 - enable RTC WDT

pub fn rtc_cntl_wdt_stg0(&mut self) -> RTC_CNTL_WDT_STG0_W

Bits 28:30 - 1: interrupt stage en 2: CPU reset stage en 3: system reset stage en 4: RTC reset stage en

pub fn rtc_cntl_wdt_stg1(&mut self) -> RTC_CNTL_WDT_STG1_W

Bits 25:27 - 1: interrupt stage en 2: CPU reset stage en 3: system reset stage en 4: RTC reset stage en

pub fn rtc_cntl_wdt_stg2(&mut self) -> RTC_CNTL_WDT_STG2_W

Bits 22:24 - 1: interrupt stage en 2: CPU reset stage en 3: system reset stage en 4: RTC reset stage en

pub fn rtc_cntl_wdt_stg3(&mut self) -> RTC_CNTL_WDT_STG3_W

Bits 19:21 - 1: interrupt stage en 2: CPU reset stage en 3: system reset stage en 4: RTC reset stage en

pub fn rtc_cntl_wdt_edge_int_en(&mut self) -> RTC_CNTL_WDT_EDGE_INT_EN_W

Bit 18 - N/A

pub fn rtc_cntl_wdt_level_int_en(&mut self) -> RTC_CNTL_WDT_LEVEL_INT_EN_W

Bit 17 - N/A

pub fn rtc_cntl_wdt_cpu_reset_length(
    &mut self
) -> RTC_CNTL_WDT_CPU_RESET_LENGTH_W

Bits 14:16 - CPU reset counter length

pub fn rtc_cntl_wdt_sys_reset_length(
    &mut self
) -> RTC_CNTL_WDT_SYS_RESET_LENGTH_W

Bits 11:13 - system reset counter length

pub fn rtc_cntl_wdt_flashboot_mod_en(
    &mut self
) -> RTC_CNTL_WDT_FLASHBOOT_MOD_EN_W

Bit 10 - enable WDT in flash boot

pub fn rtc_cntl_wdt_procpu_reset_en(&mut self) -> RTC_CNTL_WDT_PROCPU_RESET_EN_W

Bit 9 - enable WDT reset PRO CPU

pub fn rtc_cntl_wdt_appcpu_reset_en(&mut self) -> RTC_CNTL_WDT_APPCPU_RESET_EN_W

Bit 8 - enable WDT reset APP CPU

pub fn rtc_cntl_wdt_pause_in_slp(&mut self) -> RTC_CNTL_WDT_PAUSE_IN_SLP_W

Bit 7 - pause WDT in sleep