[][src]Type Definition esp32::mcpwm::mcpwm_carrier0_cfg_reg::R

type R = R<u32, MCPWM_CARRIER0_CFG_REG>;

Reader of register MCPWM_CARRIER0_CFG_REG

Methods

impl R[src]

pub fn mcpwm_carrier0_in_invert(&self) -> MCPWM_CARRIER0_IN_INVERT_R[src]

Bit 13 - When set invert the input of PWM0A and PWM0B for this submodule

pub fn mcpwm_carrier0_out_invert(&self) -> MCPWM_CARRIER0_OUT_INVERT_R[src]

Bit 12 - When set invert the output of PWM0A and PWM0B for this submodule

pub fn mcpwm_carrier0_oshwth(&self) -> MCPWM_CARRIER0_OSHWTH_R[src]

Bits 8:11 - Width of the fist pulse in number of periods of the carrier

pub fn mcpwm_carrier0_duty(&self) -> MCPWM_CARRIER0_DUTY_R[src]

Bits 5:7 - Carrier duty selection. Duty = PWM_CARRIER0_DUTY / 8

pub fn mcpwm_carrier0_prescale(&self) -> MCPWM_CARRIER0_PRESCALE_R[src]

Bits 1:4 - PWM carrier0 clock (PC_clk) prescale value. Period of PC_clk = period of PWM_clk * (PWM_CARRIER0_PRESCALE + 1)

pub fn mcpwm_carrier0_en(&self) -> MCPWM_CARRIER0_EN_R[src]

Bit 0 - When set carrier0 function is enabled. When cleared carrier0 is bypassed