[−][src]Type Definition esp32::ledc::ledc_int_ena_reg::W
type W = W<u32, LEDC_INT_ENA_REG>;
Writer for register LEDC_INT_ENA_REG
Methods
impl W
[src]
pub fn ledc_duty_chng_end_lsch7_int_ena(
&mut self
) -> LEDC_DUTY_CHNG_END_LSCH7_INT_ENA_W
[src]
&mut self
) -> LEDC_DUTY_CHNG_END_LSCH7_INT_ENA_W
Bit 23 - The interrupt enable bit for low speed channel 7 duty change done interrupt.
pub fn ledc_duty_chng_end_lsch6_int_ena(
&mut self
) -> LEDC_DUTY_CHNG_END_LSCH6_INT_ENA_W
[src]
&mut self
) -> LEDC_DUTY_CHNG_END_LSCH6_INT_ENA_W
Bit 22 - The interrupt enable bit for low speed channel 6 duty change done interrupt.
pub fn ledc_duty_chng_end_lsch5_int_ena(
&mut self
) -> LEDC_DUTY_CHNG_END_LSCH5_INT_ENA_W
[src]
&mut self
) -> LEDC_DUTY_CHNG_END_LSCH5_INT_ENA_W
Bit 21 - The interrupt enable bit for low speed channel 5 duty change done interrupt.
pub fn ledc_duty_chng_end_lsch4_int_ena(
&mut self
) -> LEDC_DUTY_CHNG_END_LSCH4_INT_ENA_W
[src]
&mut self
) -> LEDC_DUTY_CHNG_END_LSCH4_INT_ENA_W
Bit 20 - The interrupt enable bit for low speed channel 4 duty change done interrupt.
pub fn ledc_duty_chng_end_lsch3_int_ena(
&mut self
) -> LEDC_DUTY_CHNG_END_LSCH3_INT_ENA_W
[src]
&mut self
) -> LEDC_DUTY_CHNG_END_LSCH3_INT_ENA_W
Bit 19 - The interrupt enable bit for low speed channel 3 duty change done interrupt.
pub fn ledc_duty_chng_end_lsch2_int_ena(
&mut self
) -> LEDC_DUTY_CHNG_END_LSCH2_INT_ENA_W
[src]
&mut self
) -> LEDC_DUTY_CHNG_END_LSCH2_INT_ENA_W
Bit 18 - The interrupt enable bit for low speed channel 2 duty change done interrupt.
pub fn ledc_duty_chng_end_lsch1_int_ena(
&mut self
) -> LEDC_DUTY_CHNG_END_LSCH1_INT_ENA_W
[src]
&mut self
) -> LEDC_DUTY_CHNG_END_LSCH1_INT_ENA_W
Bit 17 - The interrupt enable bit for low speed channel 1 duty change done interrupt.
pub fn ledc_duty_chng_end_lsch0_int_ena(
&mut self
) -> LEDC_DUTY_CHNG_END_LSCH0_INT_ENA_W
[src]
&mut self
) -> LEDC_DUTY_CHNG_END_LSCH0_INT_ENA_W
Bit 16 - The interrupt enable bit for low speed channel 0 duty change done interrupt.
pub fn ledc_duty_chng_end_hsch7_int_ena(
&mut self
) -> LEDC_DUTY_CHNG_END_HSCH7_INT_ENA_W
[src]
&mut self
) -> LEDC_DUTY_CHNG_END_HSCH7_INT_ENA_W
Bit 15 - The interrupt enable bit for high speed channel 7 duty change done interrupt.
pub fn ledc_duty_chng_end_hsch6_int_ena(
&mut self
) -> LEDC_DUTY_CHNG_END_HSCH6_INT_ENA_W
[src]
&mut self
) -> LEDC_DUTY_CHNG_END_HSCH6_INT_ENA_W
Bit 14 - The interrupt enable bit for high speed channel 6 duty change done interrupt.
pub fn ledc_duty_chng_end_hsch5_int_ena(
&mut self
) -> LEDC_DUTY_CHNG_END_HSCH5_INT_ENA_W
[src]
&mut self
) -> LEDC_DUTY_CHNG_END_HSCH5_INT_ENA_W
Bit 13 - The interrupt enable bit for high speed channel 5 duty change done interrupt.
pub fn ledc_duty_chng_end_hsch4_int_ena(
&mut self
) -> LEDC_DUTY_CHNG_END_HSCH4_INT_ENA_W
[src]
&mut self
) -> LEDC_DUTY_CHNG_END_HSCH4_INT_ENA_W
Bit 12 - The interrupt enable bit for high speed channel 4 duty change done interrupt.
pub fn ledc_duty_chng_end_hsch3_int_ena(
&mut self
) -> LEDC_DUTY_CHNG_END_HSCH3_INT_ENA_W
[src]
&mut self
) -> LEDC_DUTY_CHNG_END_HSCH3_INT_ENA_W
Bit 11 - The interrupt enable bit for high speed channel 3 duty change done interrupt.
pub fn ledc_duty_chng_end_hsch2_int_ena(
&mut self
) -> LEDC_DUTY_CHNG_END_HSCH2_INT_ENA_W
[src]
&mut self
) -> LEDC_DUTY_CHNG_END_HSCH2_INT_ENA_W
Bit 10 - The interrupt enable bit for high speed channel 2 duty change done interrupt.
pub fn ledc_duty_chng_end_hsch1_int_ena(
&mut self
) -> LEDC_DUTY_CHNG_END_HSCH1_INT_ENA_W
[src]
&mut self
) -> LEDC_DUTY_CHNG_END_HSCH1_INT_ENA_W
Bit 9 - The interrupt enable bit for high speed channel 1 duty change done interrupt.
pub fn ledc_duty_chng_end_hsch0_int_ena(
&mut self
) -> LEDC_DUTY_CHNG_END_HSCH0_INT_ENA_W
[src]
&mut self
) -> LEDC_DUTY_CHNG_END_HSCH0_INT_ENA_W
Bit 8 - The interrupt enable bit for high speed channel 0 duty change done interrupt.
pub fn ledc_lstimer3_ovf_int_ena(&mut self) -> LEDC_LSTIMER3_OVF_INT_ENA_W
[src]
Bit 7 - The interrupt enable bit for low speed channel3 counter overflow interrupt.
pub fn ledc_lstimer2_ovf_int_ena(&mut self) -> LEDC_LSTIMER2_OVF_INT_ENA_W
[src]
Bit 6 - The interrupt enable bit for low speed channel2 counter overflow interrupt.
pub fn ledc_lstimer1_ovf_int_ena(&mut self) -> LEDC_LSTIMER1_OVF_INT_ENA_W
[src]
Bit 5 - The interrupt enable bit for low speed channel1 counter overflow interrupt.
pub fn ledc_lstimer0_ovf_int_ena(&mut self) -> LEDC_LSTIMER0_OVF_INT_ENA_W
[src]
Bit 4 - The interrupt enable bit for low speed channel0 counter overflow interrupt.
pub fn ledc_hstimer3_ovf_int_ena(&mut self) -> LEDC_HSTIMER3_OVF_INT_ENA_W
[src]
Bit 3 - The interrupt enable bit for high speed channel3 counter overflow interrupt.
pub fn ledc_hstimer2_ovf_int_ena(&mut self) -> LEDC_HSTIMER2_OVF_INT_ENA_W
[src]
Bit 2 - The interrupt enable bit for high speed channel2 counter overflow interrupt.
pub fn ledc_hstimer1_ovf_int_ena(&mut self) -> LEDC_HSTIMER1_OVF_INT_ENA_W
[src]
Bit 1 - The interrupt enable bit for high speed channel1 counter overflow interrupt.
pub fn ledc_hstimer0_ovf_int_ena(&mut self) -> LEDC_HSTIMER0_OVF_INT_ENA_W
[src]
Bit 0 - The interrupt enable bit for high speed channel0 counter overflow interrupt.