Type Definition esp32::ledc::ledc_int_clr_reg::W

type W = W<u32, LEDC_INT_CLR_REG>;

Writer for register LEDC_INT_CLR_REG

Methods

impl W

pub fn ledc_duty_chng_end_lsch7_int_clr(
    &mut self
) -> LEDC_DUTY_CHNG_END_LSCH7_INT_CLR_W

Bit 23 - Set this bit to clear low speed channel 7 duty change done interrupt.

pub fn ledc_duty_chng_end_lsch6_int_clr(
    &mut self
) -> LEDC_DUTY_CHNG_END_LSCH6_INT_CLR_W

Bit 22 - Set this bit to clear low speed channel 6 duty change done interrupt.

pub fn ledc_duty_chng_end_lsch5_int_clr(
    &mut self
) -> LEDC_DUTY_CHNG_END_LSCH5_INT_CLR_W

Bit 21 - Set this bit to clear low speed channel 5 duty change done interrupt.

pub fn ledc_duty_chng_end_lsch4_int_clr(
    &mut self
) -> LEDC_DUTY_CHNG_END_LSCH4_INT_CLR_W

Bit 20 - Set this bit to clear low speed channel 4 duty change done interrupt.

pub fn ledc_duty_chng_end_lsch3_int_clr(
    &mut self
) -> LEDC_DUTY_CHNG_END_LSCH3_INT_CLR_W

Bit 19 - Set this bit to clear low speed channel 3 duty change done interrupt.

pub fn ledc_duty_chng_end_lsch2_int_clr(
    &mut self
) -> LEDC_DUTY_CHNG_END_LSCH2_INT_CLR_W

Bit 18 - Set this bit to clear low speed channel 2 duty change done interrupt.

pub fn ledc_duty_chng_end_lsch1_int_clr(
    &mut self
) -> LEDC_DUTY_CHNG_END_LSCH1_INT_CLR_W

Bit 17 - Set this bit to clear low speed channel 1 duty change done interrupt.

pub fn ledc_duty_chng_end_lsch0_int_clr(
    &mut self
) -> LEDC_DUTY_CHNG_END_LSCH0_INT_CLR_W

Bit 16 - Set this bit to clear low speed channel 0 duty change done interrupt.

pub fn ledc_duty_chng_end_hsch7_int_clr(
    &mut self
) -> LEDC_DUTY_CHNG_END_HSCH7_INT_CLR_W

Bit 15 - Set this bit to clear high speed channel 7 duty change done interrupt.

pub fn ledc_duty_chng_end_hsch6_int_clr(
    &mut self
) -> LEDC_DUTY_CHNG_END_HSCH6_INT_CLR_W

Bit 14 - Set this bit to clear high speed channel 6 duty change done interrupt.

pub fn ledc_duty_chng_end_hsch5_int_clr(
    &mut self
) -> LEDC_DUTY_CHNG_END_HSCH5_INT_CLR_W

Bit 13 - Set this bit to clear high speed channel 5 duty change done interrupt.

pub fn ledc_duty_chng_end_hsch4_int_clr(
    &mut self
) -> LEDC_DUTY_CHNG_END_HSCH4_INT_CLR_W

Bit 12 - Set this bit to clear high speed channel 4 duty change done interrupt.

pub fn ledc_duty_chng_end_hsch3_int_clr(
    &mut self
) -> LEDC_DUTY_CHNG_END_HSCH3_INT_CLR_W

Bit 11 - Set this bit to clear high speed channel 3 duty change done interrupt.

pub fn ledc_duty_chng_end_hsch2_int_clr(
    &mut self
) -> LEDC_DUTY_CHNG_END_HSCH2_INT_CLR_W

Bit 10 - Set this bit to clear high speed channel 2 duty change done interrupt.

pub fn ledc_duty_chng_end_hsch1_int_clr(
    &mut self
) -> LEDC_DUTY_CHNG_END_HSCH1_INT_CLR_W

Bit 9 - Set this bit to clear high speed channel 1 duty change done interrupt.

pub fn ledc_duty_chng_end_hsch0_int_clr(
    &mut self
) -> LEDC_DUTY_CHNG_END_HSCH0_INT_CLR_W

Bit 8 - Set this bit to clear high speed channel 0 duty change done interrupt.

pub fn ledc_lstimer3_ovf_int_clr(&mut self) -> LEDC_LSTIMER3_OVF_INT_CLR_W

Bit 7 - Set this bit to clear low speed channel3 counter overflow interrupt.

pub fn ledc_lstimer2_ovf_int_clr(&mut self) -> LEDC_LSTIMER2_OVF_INT_CLR_W

Bit 6 - Set this bit to clear low speed channel2 counter overflow interrupt.

pub fn ledc_lstimer1_ovf_int_clr(&mut self) -> LEDC_LSTIMER1_OVF_INT_CLR_W

Bit 5 - Set this bit to clear low speed channel1 counter overflow interrupt.

pub fn ledc_lstimer0_ovf_int_clr(&mut self) -> LEDC_LSTIMER0_OVF_INT_CLR_W

Bit 4 - Set this bit to clear low speed channel0 counter overflow interrupt.

pub fn ledc_hstimer3_ovf_int_clr(&mut self) -> LEDC_HSTIMER3_OVF_INT_CLR_W

Bit 3 - Set this bit to clear high speed channel3 counter overflow interrupt.

pub fn ledc_hstimer2_ovf_int_clr(&mut self) -> LEDC_HSTIMER2_OVF_INT_CLR_W

Bit 2 - Set this bit to clear high speed channel2 counter overflow interrupt.

pub fn ledc_hstimer1_ovf_int_clr(&mut self) -> LEDC_HSTIMER1_OVF_INT_CLR_W

Bit 1 - Set this bit to clear high speed channel1 counter overflow interrupt.

pub fn ledc_hstimer0_ovf_int_clr(&mut self) -> LEDC_HSTIMER0_OVF_INT_CLR_W

Bit 0 - Set this bit to clear high speed channel0 counter overflow interrupt.