Type Definition esp32::i2c::i2c_sr_reg::W

type W = W<u32, I2C_SR_REG>;

Writer for register I2C_SR_REG

Methods

impl W

pub fn i2c_scl_state_last(&mut self) -> I2C_SCL_STATE_LAST_W

Bits 28:30 - This register stores the value of state machine to produce SCL. 3'h0: SCL_IDLE 3'h1:SCL_START 3'h2:SCL_LOW_EDGE 3'h3: SCL_LOW 3'h4:SCL_HIGH_EDGE 3'h5:SCL_HIGH 3'h6:SCL_STOP

pub fn i2c_scl_main_state_last(&mut self) -> I2C_SCL_MAIN_STATE_LAST_W

Bits 24:26 - This register stores the value of state machine for i2c module. 3'h0: SCL_MAIN_IDLE 3'h1: SCL_ADDRESS_SHIFT 3'h2: SCL_ACK_ADDRESS 3'h3: SCL_RX_DATA 3'h4 SCL_TX_DATA 3'h5:SCL_SEND_ACK 3'h6:SCL_WAIT_ACK

pub fn i2c_txfifo_cnt(&mut self) -> I2C_TXFIFO_CNT_W

Bits 18:23 - This register stores the amount of received data in ram.

pub fn i2c_rxfifo_cnt(&mut self) -> I2C_RXFIFO_CNT_W

Bits 8:13 - This register represent the amount of data need to send.

pub fn i2c_byte_trans(&mut self) -> I2C_BYTE_TRANS_W

Bit 6 - This register changes to high level when one byte is transferred.

pub fn i2c_slave_addressed(&mut self) -> I2C_SLAVE_ADDRESSED_W

Bit 5 - when configured as i2c slave and the address send by master is equal to slave's address then this bit will be high level.

pub fn i2c_bus_busy(&mut self) -> I2C_BUS_BUSY_W

Bit 4 - 1:I2C bus is busy transferring data. 0:I2C bus is in idle state.

pub fn i2c_arb_lost(&mut self) -> I2C_ARB_LOST_W

Bit 3 - when I2C lost control of SDA line this register changes to high level.

pub fn i2c_time_out(&mut self) -> I2C_TIME_OUT_W

Bit 2 - when I2C takes more than time_out_reg clocks to receive a data then this register changes to high level.

pub fn i2c_slave_rw(&mut self) -> I2C_SLAVE_RW_W

Bit 1 - when in slave mode 1: master read slave 0: master write slave.

pub fn i2c_ack_rec(&mut self) -> I2C_ACK_REC_W

Bit 0 - This register stores the value of ACK bit.