[−][src]Type Definition esp32::i2c::i2c_sr_reg::R
type R = R<u32, I2C_SR_REG>;
Reader of register I2C_SR_REG
Methods
impl R
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pub fn i2c_scl_state_last(&self) -> I2C_SCL_STATE_LAST_R
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Bits 28:30 - This register stores the value of state machine to produce SCL. 3'h0: SCL_IDLE 3'h1:SCL_START 3'h2:SCL_LOW_EDGE 3'h3: SCL_LOW 3'h4:SCL_HIGH_EDGE 3'h5:SCL_HIGH 3'h6:SCL_STOP
pub fn i2c_scl_main_state_last(&self) -> I2C_SCL_MAIN_STATE_LAST_R
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Bits 24:26 - This register stores the value of state machine for i2c module. 3'h0: SCL_MAIN_IDLE 3'h1: SCL_ADDRESS_SHIFT 3'h2: SCL_ACK_ADDRESS 3'h3: SCL_RX_DATA 3'h4 SCL_TX_DATA 3'h5:SCL_SEND_ACK 3'h6:SCL_WAIT_ACK
pub fn i2c_txfifo_cnt(&self) -> I2C_TXFIFO_CNT_R
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Bits 18:23 - This register stores the amount of received data in ram.
pub fn i2c_rxfifo_cnt(&self) -> I2C_RXFIFO_CNT_R
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Bits 8:13 - This register represent the amount of data need to send.
pub fn i2c_byte_trans(&self) -> I2C_BYTE_TRANS_R
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Bit 6 - This register changes to high level when one byte is transferred.
pub fn i2c_slave_addressed(&self) -> I2C_SLAVE_ADDRESSED_R
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Bit 5 - when configured as i2c slave and the address send by master is equal to slave's address then this bit will be high level.
pub fn i2c_bus_busy(&self) -> I2C_BUS_BUSY_R
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Bit 4 - 1:I2C bus is busy transferring data. 0:I2C bus is in idle state.
pub fn i2c_arb_lost(&self) -> I2C_ARB_LOST_R
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Bit 3 - when I2C lost control of SDA line this register changes to high level.
pub fn i2c_time_out(&self) -> I2C_TIME_OUT_R
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Bit 2 - when I2C takes more than time_out_reg clocks to receive a data then this register changes to high level.
pub fn i2c_slave_rw(&self) -> I2C_SLAVE_RW_R
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Bit 1 - when in slave mode 1: master read slave 0: master write slave.
pub fn i2c_ack_rec(&self) -> I2C_ACK_REC_R
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Bit 0 - This register stores the value of ACK bit.