[][src]Type Definition esp32::i2c::i2c_fifo_conf_reg::W

type W = W<u32, I2C_FIFO_CONF_REG>;

Writer for register I2C_FIFO_CONF_REG

Methods

impl W[src]

pub fn i2c_nonfifo_tx_thres(&mut self) -> I2C_NONFIFO_TX_THRES_W[src]

Bits 20:25 - when I2C sends more than nonfifo_tx_thres data it will produce tx_send_empty_int_raw interrupt and update the current offset address of the sending data.

pub fn i2c_nonfifo_rx_thres(&mut self) -> I2C_NONFIFO_RX_THRES_W[src]

Bits 14:19 - when I2C receives more than nonfifo_rx_thres data it will produce rx_send_full_int_raw interrupt and update the current offset address of the receiving data.

pub fn i2c_tx_fifo_rst(&mut self) -> I2C_TX_FIFO_RST_W[src]

Bit 13 - Set this bit to reset tx fifo when using apb fifo access.

pub fn i2c_rx_fifo_rst(&mut self) -> I2C_RX_FIFO_RST_W[src]

Bit 12 - Set this bit to reset rx fifo when using apb fifo access.

pub fn i2c_fifo_addr_cfg_en(&mut self) -> I2C_FIFO_ADDR_CFG_EN_W[src]

Bit 11 - When this bit is set to 1 then the byte after address represent the offset address of I2C Slave's ram.

pub fn i2c_nonfifo_en(&mut self) -> I2C_NONFIFO_EN_W[src]

Bit 10 - Set this bit to enble apb nonfifo access.

pub fn i2c_txfifo_empty_thrhd(&mut self) -> I2C_TXFIFO_EMPTY_THRHD_W[src]

Bits 5:9 - Config txfifo empty threhd value when using apb fifo access

pub fn i2c_rxfifo_full_thrhd(&mut self) -> I2C_RXFIFO_FULL_THRHD_W[src]

Bits 0:4