[][src]Type Definition esp32::i2c::i2c_ctr_reg::W

type W = W<u32, I2C_CTR_REG>;

Writer for register I2C_CTR_REG

Methods

impl W[src]

pub fn i2c_clk_en(&mut self) -> I2C_CLK_EN_W[src]

Bit 8 - This is the clock gating control bit for reading or writing registers.

pub fn i2c_rx_lsb_first(&mut self) -> I2C_RX_LSB_FIRST_W[src]

Bit 7 - This bit is used to control the storage mode for received datas. 1: receive data from most significant bit 0: receive data from least significant bit

pub fn i2c_tx_lsb_first(&mut self) -> I2C_TX_LSB_FIRST_W[src]

Bit 6 - This bit is used to control the sending mode for data need to be send. 1: receive data from most significant bit 0: receive data from least significant bit

pub fn i2c_trans_start(&mut self) -> I2C_TRANS_START_W[src]

Bit 5 - Set this bit to start sending data in txfifo.

pub fn i2c_ms_mode(&mut self) -> I2C_MS_MODE_W[src]

Bit 4 - Set this bit to configure the module as i2c master clear this bit to configure the module as i2c slave.

pub fn i2c_sample_scl_level(&mut self) -> I2C_SAMPLE_SCL_LEVEL_W[src]

Bit 2 - Set this bit to sample data in SCL low level. clear this bit to sample data in SCL high level.

pub fn i2c_scl_force_out(&mut self) -> I2C_SCL_FORCE_OUT_W[src]

Bit 1 - 1: normally ouput scl clock 0: exchange the function of scl_o and scl_oe (scl_o is the original internal output scl signal scl_oe is the enable bit for the internal output scl signal)

pub fn i2c_sda_force_out(&mut self) -> I2C_SDA_FORCE_OUT_W[src]

Bit 0 - 1: normally ouput sda data 0: exchange the function of sda_o and sda_oe (sda_o is the original internal output sda signal sda_oe is the enable bit for the internal output sda signal)