Struct esp32_hal::pac::spi0::cache_sctrl::W

pub struct W(_);

Register CACHE_SCTRL writer

Implementations

impl W

pub fn usr_sram_dio(
    &mut self
) -> BitWriterRaw<'_, u32, CACHE_SCTRL_SPEC, bool, BitM, 1>

Bit 1 - For SPI0 In the spi sram mode spi dual I/O mode enable 1: enable 0:disable

pub fn usr_sram_qio(
    &mut self
) -> BitWriterRaw<'_, u32, CACHE_SCTRL_SPEC, bool, BitM, 2>

Bit 2 - For SPI0 In the spi sram mode spi quad I/O mode enable 1: enable 0:disable

pub fn usr_wr_sram_dummy(
    &mut self
) -> BitWriterRaw<'_, u32, CACHE_SCTRL_SPEC, bool, BitM, 3>

Bit 3 - For SPI0 In the spi sram mode it is the enable bit of dummy phase for write operations.

pub fn usr_rd_sram_dummy(
    &mut self
) -> BitWriterRaw<'_, u32, CACHE_SCTRL_SPEC, bool, BitM, 4>

Bit 4 - For SPI0 In the spi sram mode it is the enable bit of dummy phase for read operations.

pub fn cache_sram_usr_rcmd(
    &mut self
) -> BitWriterRaw<'_, u32, CACHE_SCTRL_SPEC, bool, BitM, 5>

Bit 5 - For SPI0 In the spi sram mode cache read sram for user define command.

pub fn sram_bytes_len(
    &mut self
) -> FieldWriterRaw<'_, u32, CACHE_SCTRL_SPEC, u8, u8, Unsafe, 8, 6>

Bits 6:13 - For SPI0 In the sram mode it is the byte length of spi read sram data.

pub fn sram_dummy_cyclelen(
    &mut self
) -> FieldWriterRaw<'_, u32, CACHE_SCTRL_SPEC, u8, u8, Unsafe, 8, 14>

Bits 14:21 - For SPI0 In the sram mode it is the length in bits of address phase. The register value shall be (bit_num-1).

pub fn sram_addr_bitlen(
    &mut self
) -> FieldWriterRaw<'_, u32, CACHE_SCTRL_SPEC, u8, u8, Unsafe, 6, 22>

Bits 22:27 - For SPI0 In the sram mode it is the length in bits of address phase. The register value shall be (bit_num-1).

pub fn cache_sram_usr_wcmd(
    &mut self
) -> BitWriterRaw<'_, u32, CACHE_SCTRL_SPEC, bool, BitM, 28>

Bit 28 - For SPI0 In the spi sram mode cache write sram for user define command

pub unsafe fn bits(&mut self, bits: u32) -> &mut W

Writes raw bits to the register.

Methods from Deref<Target = W<CACHE_SCTRL_SPEC>>

pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>

Writes raw bits to the register.

Safety

Read datasheet or reference manual to find what values are allowed to pass.

Trait Implementations

impl Deref for W

type Target = W<CACHE_SCTRL_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &<W as Deref>::Target

Dereferences the value.

impl DerefMut for W

fn deref_mut(&mut self) -> &mut <W as Deref>::Target

Mutably dereferences the value.

impl From<W<CACHE_SCTRL_SPEC>> for W

fn from(writer: W<CACHE_SCTRL_SPEC>) -> W

Converts to this type from the input type.