pub struct W(_);
Expand description
Register RINTSTS
writer
Implementations§
§impl W
impl W
pub fn int_status_raw(
&mut self
) -> FieldWriterRaw<'_, u32, RINTSTS_SPEC, u16, u16, Unsafe, 16, 0>
pub fn int_status_raw(
&mut self
) -> FieldWriterRaw<'_, u32, RINTSTS_SPEC, u16, u16, Unsafe, 16, 0>
Bits 0:15 - Setting a bit clears the corresponding interrupt and writing 0 has no effect. Bits are logged regardless of interrupt mask status. Bit 15 (EBE): End-bit error/no CRC error; Bit 14 (ACD): Auto command done; Bit 13 (SBE/BCI): RX Start Bit Error; Bit 12 (HLE): Hardware locked write error; Bit 11 (FRUN): FIFO underrun/overrun error; Bit 10 (HTO): Data starvation by host timeout (HTO); Bit 9 (DTRO): Data read timeout; Bit 8 (RTO): Response timeout; Bit 7 (DCRC): Data CRC error; Bit 6 (RCRC): Response CRC error; Bit 5 (RXDR): Receive FIFO data request; Bit 4 (TXDR): Transmit FIFO data request; Bit 3 (DTO): Data transfer over; Bit 2 (CD): Command done; Bit 1 (RE): Response error; Bit 0 (CD): Card detect.
pub fn sdio_interrupt_raw(
&mut self
) -> FieldWriterRaw<'_, u32, RINTSTS_SPEC, u8, u8, Unsafe, 2, 16>
pub fn sdio_interrupt_raw(
&mut self
) -> FieldWriterRaw<'_, u32, RINTSTS_SPEC, u8, u8, Unsafe, 2, 16>
Bits 16:17 - Interrupt from SDIO card, one bit for each card. Bit[17:16] correspond to card1 and card0, respectively. Setting a bit clears the corresponding interrupt bit and writing 0 has no effect. 0: No SDIO interrupt from card; 1: SDIO interrupt from card.
Methods from Deref<Target = W<RINTSTS_SPEC>>§
pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
Writes raw bits to the register.
Safety
Read datasheet or reference manual to find what values are allowed to pass.