pub struct W(_);
Expand description
Register CH%sCONF0
writer
Implementations§
§impl W
impl W
pub fn div_cnt(
&mut self
) -> FieldWriterRaw<'_, u32, CHCONF0_SPEC, u8, u8, Unsafe, 8, 0>
pub fn div_cnt(
&mut self
) -> FieldWriterRaw<'_, u32, CHCONF0_SPEC, u8, u8, Unsafe, 8, 0>
Bits 0:7 - This register is used to configure the frequency divider’s factor in channel0.
pub fn idle_thres(
&mut self
) -> FieldWriterRaw<'_, u32, CHCONF0_SPEC, u16, u16, Unsafe, 16, 8>
pub fn idle_thres(
&mut self
) -> FieldWriterRaw<'_, u32, CHCONF0_SPEC, u16, u16, Unsafe, 16, 8>
Bits 8:23 - In receive mode when no edge is detected on the input signal for longer than reg_idle_thres_ch0 then the receive process is done.
pub fn mem_size(
&mut self
) -> FieldWriterRaw<'_, u32, CHCONF0_SPEC, u8, u8, Unsafe, 4, 24>
pub fn mem_size(
&mut self
) -> FieldWriterRaw<'_, u32, CHCONF0_SPEC, u8, u8, Unsafe, 4, 24>
Bits 24:27 - This register is used to configure the the amount of memory blocks allocated to channel0.
pub fn carrier_en(
&mut self
) -> BitWriterRaw<'_, u32, CHCONF0_SPEC, bool, BitM, 28>
pub fn carrier_en(
&mut self
) -> BitWriterRaw<'_, u32, CHCONF0_SPEC, bool, BitM, 28>
Bit 28 - This is the carrier modulation enable control bit for channel0.
pub fn carrier_out_lv(
&mut self
) -> BitWriterRaw<'_, u32, CHCONF0_SPEC, bool, BitM, 29>
pub fn carrier_out_lv(
&mut self
) -> BitWriterRaw<'_, u32, CHCONF0_SPEC, bool, BitM, 29>
Bit 29 - This bit is used to configure the way carrier wave is modulated for channel0.1’b1:transmit on low output level 1’b0:transmit on high output level.
pub fn mem_pd(&mut self) -> BitWriterRaw<'_, u32, CHCONF0_SPEC, bool, BitM, 30>
pub fn mem_pd(&mut self) -> BitWriterRaw<'_, u32, CHCONF0_SPEC, bool, BitM, 30>
Bit 30 - This bit is used to reduce power consumed by mem. 1:mem is in low power state.
pub fn clk_en(&mut self) -> BitWriterRaw<'_, u32, CHCONF0_SPEC, bool, BitM, 31>
pub fn clk_en(&mut self) -> BitWriterRaw<'_, u32, CHCONF0_SPEC, bool, BitM, 31>
Bit 31 - This bit is used to control clock.when software config RMT internal registers it controls the register clock.
Methods from Deref<Target = W<CHCONF0_SPEC>>§
pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
Writes raw bits to the register.
Safety
Read datasheet or reference manual to find what values are allowed to pass.