Struct esp32_hal::pac::efuse::blk0_rdata5::R
pub struct R(_);
Expand description
Register BLK0_RDATA5
reader
Implementations§
§impl R
impl R
pub fn rd_spi_pad_config_clk(&self) -> FieldReaderRaw<u8, u8>
pub fn rd_spi_pad_config_clk(&self) -> FieldReaderRaw<u8, u8>
Bits 0:4 - read for SPI_pad_config_clk
pub fn rd_spi_pad_config_q(&self) -> FieldReaderRaw<u8, u8>
pub fn rd_spi_pad_config_q(&self) -> FieldReaderRaw<u8, u8>
Bits 5:9 - read for SPI_pad_config_q
pub fn rd_spi_pad_config_d(&self) -> FieldReaderRaw<u8, u8>
pub fn rd_spi_pad_config_d(&self) -> FieldReaderRaw<u8, u8>
Bits 10:14 - read for SPI_pad_config_d
pub fn rd_spi_pad_config_cs0(&self) -> FieldReaderRaw<u8, u8>
pub fn rd_spi_pad_config_cs0(&self) -> FieldReaderRaw<u8, u8>
Bits 15:19 - read for SPI_pad_config_cs0
pub fn rd_chip_ver_rev2(&self) -> BitReaderRaw<bool>
pub fn rd_chip_ver_rev2(&self) -> BitReaderRaw<bool>
Bit 20
pub fn rd_vol_level_hp_inv(&self) -> FieldReaderRaw<u8, u8>
pub fn rd_vol_level_hp_inv(&self) -> FieldReaderRaw<u8, u8>
Bits 22:23 - This field stores the voltage level for CPU to run at 240 MHz, or for flash/PSRAM to run at 80 MHz.0x0: level 7; 0x1: level 6; 0x2: level 5; 0x3: level 4. (RO)
pub fn rd_wafer_version_minor(&self) -> FieldReaderRaw<u8, u8>
pub fn rd_wafer_version_minor(&self) -> FieldReaderRaw<u8, u8>
Bits 24:25
pub fn rd_flash_crypt_config(&self) -> FieldReaderRaw<u8, u8>
pub fn rd_flash_crypt_config(&self) -> FieldReaderRaw<u8, u8>
Bits 28:31 - read for flash_crypt_config
Methods from Deref<Target = R<BLK0_RDATA5_SPEC>>§
pub fn bits(&self) -> <REG as RegisterSpec>::Ux
pub fn bits(&self) -> <REG as RegisterSpec>::Ux
Reads raw bits from register.
Trait Implementations§
§impl From<R<BLK0_RDATA5_SPEC>> for R
impl From<R<BLK0_RDATA5_SPEC>> for R
§fn from(reader: R<BLK0_RDATA5_SPEC>) -> R
fn from(reader: R<BLK0_RDATA5_SPEC>) -> R
Converts to this type from the input type.