pub struct W(_);
Expand description
Register CTR
writer
Implementations§
§impl W
impl W
pub fn sda_force_out(
&mut self
) -> BitWriterRaw<'_, u32, CTR_SPEC, bool, BitM, 0>
pub fn sda_force_out(
&mut self
) -> BitWriterRaw<'_, u32, CTR_SPEC, bool, BitM, 0>
Bit 0 - 1: normally ouput sda data 0: exchange the function of sda_o and sda_oe (sda_o is the original internal output sda signal sda_oe is the enable bit for the internal output sda signal)
pub fn scl_force_out(
&mut self
) -> BitWriterRaw<'_, u32, CTR_SPEC, bool, BitM, 1>
pub fn scl_force_out(
&mut self
) -> BitWriterRaw<'_, u32, CTR_SPEC, bool, BitM, 1>
Bit 1 - 1: normally ouput scl clock 0: exchange the function of scl_o and scl_oe (scl_o is the original internal output scl signal scl_oe is the enable bit for the internal output scl signal)
pub fn sample_scl_level(
&mut self
) -> BitWriterRaw<'_, u32, CTR_SPEC, bool, BitM, 2>
pub fn sample_scl_level(
&mut self
) -> BitWriterRaw<'_, u32, CTR_SPEC, bool, BitM, 2>
Bit 2 - Set this bit to sample data in SCL low level. clear this bit to sample data in SCL high level.
pub fn ms_mode(&mut self) -> BitWriterRaw<'_, u32, CTR_SPEC, bool, BitM, 4>
pub fn ms_mode(&mut self) -> BitWriterRaw<'_, u32, CTR_SPEC, bool, BitM, 4>
Bit 4 - Set this bit to configure the module as i2c master clear this bit to configure the module as i2c slave.
pub fn trans_start(&mut self) -> BitWriterRaw<'_, u32, CTR_SPEC, bool, BitM, 5>
pub fn trans_start(&mut self) -> BitWriterRaw<'_, u32, CTR_SPEC, bool, BitM, 5>
Bit 5 - Set this bit to start sending data in txfifo.
pub fn tx_lsb_first(&mut self) -> BitWriterRaw<'_, u32, CTR_SPEC, bool, BitM, 6>
pub fn tx_lsb_first(&mut self) -> BitWriterRaw<'_, u32, CTR_SPEC, bool, BitM, 6>
Bit 6 - This bit is used to control the sending mode for data need to be send. 1: receive data from most significant bit 0: receive data from least significant bit
pub fn rx_lsb_first(&mut self) -> BitWriterRaw<'_, u32, CTR_SPEC, bool, BitM, 7>
pub fn rx_lsb_first(&mut self) -> BitWriterRaw<'_, u32, CTR_SPEC, bool, BitM, 7>
Bit 7 - This bit is used to control the storage mode for received datas. 1: receive data from most significant bit 0: receive data from least significant bit
Methods from Deref<Target = W<CTR_SPEC>>§
pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
Writes raw bits to the register.
Safety
Read datasheet or reference manual to find what values are allowed to pass.