Struct esp32_hal::pac::i2c0::ctr::R

pub struct R(_);

Register CTR reader

Implementations

impl R

pub fn sda_force_out(&self) -> BitReaderRaw<bool>

Bit 0 - 1: normally ouput sda data 0: exchange the function of sda_o and sda_oe (sda_o is the original internal output sda signal sda_oe is the enable bit for the internal output sda signal)

pub fn scl_force_out(&self) -> BitReaderRaw<bool>

Bit 1 - 1: normally ouput scl clock 0: exchange the function of scl_o and scl_oe (scl_o is the original internal output scl signal scl_oe is the enable bit for the internal output scl signal)

pub fn sample_scl_level(&self) -> BitReaderRaw<bool>

Bit 2 - Set this bit to sample data in SCL low level. clear this bit to sample data in SCL high level.

pub fn ms_mode(&self) -> BitReaderRaw<bool>

Bit 4 - Set this bit to configure the module as i2c master clear this bit to configure the module as i2c slave.

pub fn trans_start(&self) -> BitReaderRaw<bool>

Bit 5 - Set this bit to start sending data in txfifo.

pub fn tx_lsb_first(&self) -> BitReaderRaw<bool>

Bit 6 - This bit is used to control the sending mode for data need to be send. 1: receive data from most significant bit 0: receive data from least significant bit

pub fn rx_lsb_first(&self) -> BitReaderRaw<bool>

Bit 7 - This bit is used to control the storage mode for received datas. 1: receive data from most significant bit 0: receive data from least significant bit

pub fn clk_en(&self) -> BitReaderRaw<bool>

Bit 8 - This is the clock gating control bit for reading or writing registers.

Methods from Deref<Target = R<CTR_SPEC>>

pub fn bits(&self) -> <REG as RegisterSpec>::Ux

Reads raw bits from register.

Trait Implementations

impl Deref for R

type Target = R<CTR_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &<R as Deref>::Target

Dereferences the value.

impl From<R<CTR_SPEC>> for R

fn from(reader: R<CTR_SPEC>) -> R

Converts to this type from the input type.