Struct esp32_hal::peripherals::SPI3

pub struct SPI3 { /* private fields */ }

Implementations

impl SPI3

pub unsafe fn steal() -> SPI3

Unsafely create an instance of this peripheral out of thin air.

Safety

You must ensure that you’re only using one instance of this type at a time.

pub const PTR: *const <SPI3 as Deref>::Target = {0x3ff65000 as *const <esp32::SPI3 as core::ops::Deref>::Target}

Pointer to the register block

pub const fn ptr() -> *const <SPI3 as Deref>::Target

Return the pointer to the register block

Methods from Deref<Target = RegisterBlock>

pub fn cmd(&self) -> &Reg<CMD_SPEC>

0x00 -

pub fn addr(&self) -> &Reg<ADDR_SPEC>

0x04 -

pub fn ctrl(&self) -> &Reg<CTRL_SPEC>

0x08 -

pub fn ctrl1(&self) -> &Reg<CTRL1_SPEC>

0x0c -

pub fn rd_status(&self) -> &Reg<RD_STATUS_SPEC>

0x10 -

pub fn ctrl2(&self) -> &Reg<CTRL2_SPEC>

0x14 -

pub fn clock(&self) -> &Reg<CLOCK_SPEC>

0x18 -

pub fn user(&self) -> &Reg<USER_SPEC>

0x1c -

pub fn user1(&self) -> &Reg<USER1_SPEC>

0x20 -

pub fn user2(&self) -> &Reg<USER2_SPEC>

0x24 -

pub fn mosi_dlen(&self) -> &Reg<MOSI_DLEN_SPEC>

0x28 -

pub fn miso_dlen(&self) -> &Reg<MISO_DLEN_SPEC>

0x2c -

pub fn slv_wr_status(&self) -> &Reg<SLV_WR_STATUS_SPEC>

0x30 -

pub fn pin(&self) -> &Reg<PIN_SPEC>

0x34 -

pub fn slave(&self) -> &Reg<SLAVE_SPEC>

0x38 -

pub fn slave1(&self) -> &Reg<SLAVE1_SPEC>

0x3c -

pub fn slave2(&self) -> &Reg<SLAVE2_SPEC>

0x40 -

pub fn slave3(&self) -> &Reg<SLAVE3_SPEC>

0x44 -

pub fn slv_wrbuf_dlen(&self) -> &Reg<SLV_WRBUF_DLEN_SPEC>

0x48 -

pub fn slv_rdbuf_dlen(&self) -> &Reg<SLV_RDBUF_DLEN_SPEC>

0x4c -

pub fn cache_fctrl(&self) -> &Reg<CACHE_FCTRL_SPEC>

0x50 -

pub fn cache_sctrl(&self) -> &Reg<CACHE_SCTRL_SPEC>

0x54 -

pub fn sram_cmd(&self) -> &Reg<SRAM_CMD_SPEC>

0x58 -

pub fn sram_drd_cmd(&self) -> &Reg<SRAM_DRD_CMD_SPEC>

0x5c -

pub fn sram_dwr_cmd(&self) -> &Reg<SRAM_DWR_CMD_SPEC>

0x60 -

pub fn slv_rd_bit(&self) -> &Reg<SLV_RD_BIT_SPEC>

0x64 -

pub fn w0(&self) -> &Reg<W0_SPEC>

0x80 -

pub fn w1(&self) -> &Reg<W1_SPEC>

0x84 -

pub fn w2(&self) -> &Reg<W2_SPEC>

0x88 -

pub fn w3(&self) -> &Reg<W3_SPEC>

0x8c -

pub fn w4(&self) -> &Reg<W4_SPEC>

0x90 -

pub fn w5(&self) -> &Reg<W5_SPEC>

0x94 -

pub fn w6(&self) -> &Reg<W6_SPEC>

0x98 -

pub fn w7(&self) -> &Reg<W7_SPEC>

0x9c -

pub fn w8(&self) -> &Reg<W8_SPEC>

0xa0 -

pub fn w9(&self) -> &Reg<W9_SPEC>

0xa4 -

pub fn w10(&self) -> &Reg<W10_SPEC>

0xa8 -

pub fn w11(&self) -> &Reg<W11_SPEC>

0xac -

pub fn w12(&self) -> &Reg<W12_SPEC>

0xb0 -

pub fn w13(&self) -> &Reg<W13_SPEC>

0xb4 -

pub fn w14(&self) -> &Reg<W14_SPEC>

0xb8 -

pub fn w15(&self) -> &Reg<W15_SPEC>

0xbc -

pub fn tx_crc(&self) -> &Reg<TX_CRC_SPEC>

0xc0 -

pub fn ext0(&self) -> &Reg<EXT0_SPEC>

0xf0 -

pub fn ext1(&self) -> &Reg<EXT1_SPEC>

0xf4 -

pub fn ext2(&self) -> &Reg<EXT2_SPEC>

0xf8 -

pub fn ext3(&self) -> &Reg<EXT3_SPEC>

0xfc -

pub fn dma_conf(&self) -> &Reg<DMA_CONF_SPEC>

0x100 -

pub fn dma_out_link(&self) -> &Reg<DMA_OUT_LINK_SPEC>

0x104 -

pub fn dma_in_link(&self) -> &Reg<DMA_IN_LINK_SPEC>

0x108 -

pub fn dma_status(&self) -> &Reg<DMA_STATUS_SPEC>

0x10c -

pub fn dma_int_ena(&self) -> &Reg<DMA_INT_ENA_SPEC>

0x110 -

pub fn dma_int_raw(&self) -> &Reg<DMA_INT_RAW_SPEC>

0x114 -

pub fn dma_int_st(&self) -> &Reg<DMA_INT_ST_SPEC>

0x118 -

pub fn dma_int_clr(&self) -> &Reg<DMA_INT_CLR_SPEC>

0x11c -

pub fn in_err_eof_des_addr(&self) -> &Reg<IN_ERR_EOF_DES_ADDR_SPEC>

0x120 -

pub fn in_suc_eof_des_addr(&self) -> &Reg<IN_SUC_EOF_DES_ADDR_SPEC>

0x124 -

pub fn inlink_dscr(&self) -> &Reg<INLINK_DSCR_SPEC>

0x128 -

pub fn inlink_dscr_bf0(&self) -> &Reg<INLINK_DSCR_BF0_SPEC>

0x12c -

pub fn inlink_dscr_bf1(&self) -> &Reg<INLINK_DSCR_BF1_SPEC>

0x130 -

pub fn out_eof_bfr_des_addr(&self) -> &Reg<OUT_EOF_BFR_DES_ADDR_SPEC>

0x134 -

pub fn out_eof_des_addr(&self) -> &Reg<OUT_EOF_DES_ADDR_SPEC>

0x138 -

pub fn outlink_dscr(&self) -> &Reg<OUTLINK_DSCR_SPEC>

0x13c -

pub fn outlink_dscr_bf0(&self) -> &Reg<OUTLINK_DSCR_BF0_SPEC>

0x140 -

pub fn outlink_dscr_bf1(&self) -> &Reg<OUTLINK_DSCR_BF1_SPEC>

0x144 -

pub fn dma_rstatus(&self) -> &Reg<DMA_RSTATUS_SPEC>

0x148 -

pub fn dma_tstatus(&self) -> &Reg<DMA_TSTATUS_SPEC>

0x14c -

pub fn date(&self) -> &Reg<DATE_SPEC>

0x3fc -

Trait Implementations

impl Debug for SPI3

fn fmt(&self, f: &mut Formatter<'_>) -> Result<(), Error>

Formats the value using the given formatter.

impl Deref for SPI3

type Target = <SPI3 as Deref>::Target

The resulting type after dereferencing.

fn deref(&self) -> &<SPI3 as Deref>::Target

Dereferences the value.

impl DerefMut for SPI3

fn deref_mut(&mut self) -> &mut <SPI3 as Deref>::Target

Mutably dereferences the value.

impl Instance for SPI3

fn register_block(&self) -> &RegisterBlock

fn sclk_signal(&self) -> OutputSignal

fn mosi_signal(&self) -> OutputSignal

fn miso_signal(&self) -> InputSignal

fn cs_signal(&self) -> OutputSignal

fn enable_peripheral(&self)

fn spi_num(&self) -> u8

fn init(&mut self)

Initialize for full-duplex 1 bit mode

fn init_spi_data_mode( &mut self, cmd_mode: SpiDataMode, address_mode: SpiDataMode, data_mode: SpiDataMode )

fn setup(&mut self, frequency: Rate<u32, 1, 1>, clocks: &Clocks<'_>)

fn set_data_mode(&mut self, data_mode: SpiMode) -> &mut Self

fn ch_bus_freq(&mut self, frequency: Rate<u32, 1, 1>, clocks: &Clocks<'_>)

fn read_byte(&mut self) -> Result<u8, Error<Error>>

fn write_byte(&mut self, word: u8) -> Result<(), Error<Error>>

fn write_bytes(&mut self, words: &[u8]) -> Result<(), Error>

Write bytes to SPI.

fn read_bytes(&mut self, words: &mut [u8]) -> Result<(), Error>

Read bytes from SPI.

fn read_bytes_from_fifo(&mut self, words: &mut [u8]) -> Result<(), Error>

Read received bytes from SPI FIFO.

fn busy(&self) -> bool

fn flush(&mut self) -> Result<(), Error>

fn transfer<'w>(&mut self, words: &'w mut [u8]) -> Result<&'w [u8], Error>

fn start_operation(&self)

fn init_half_duplex( &mut self, is_write: bool, command_state: bool, address_state: bool, dummy_idle: bool, dummy_state: bool, no_mosi_miso: bool )

fn write_bytes_half_duplex( &mut self, cmd: Command, address: Address, dummy: u8, buffer: &[u8] ) -> Result<(), Error>

fn read_bytes_half_duplex( &mut self, cmd: Command, address: Address, dummy: u8, buffer: &mut [u8] ) -> Result<(), Error>

fn update(&self)

fn configure_datalen(&self, len: u32)

impl<TX, RX> InstanceDma<TX, RX> for SPI3

where TX: Tx, RX: Rx,

fn transfer_in_place_dma<'w>( &mut self, words: &'w mut [u8], tx: &mut TX, rx: &mut RX ) -> Result<&'w [u8], Error>

fn transfer_dma<'w>( &mut self, write_buffer: &'w [u8], read_buffer: &'w mut [u8], tx: &mut TX, rx: &mut RX ) -> Result<&'w [u8], Error>

fn start_transfer_dma<'w>( &mut self, write_buffer_ptr: *const u8, write_buffer_len: usize, read_buffer_ptr: *mut u8, read_buffer_len: usize, tx: &mut TX, rx: &mut RX, listen: bool ) -> Result<(), Error>

fn write_bytes_dma<'w>( &mut self, words: &'w [u8], tx: &mut TX ) -> Result<&'w [u8], Error>

fn start_write_bytes_dma<'w>( &mut self, ptr: *const u8, len: usize, tx: &mut TX, listen: bool ) -> Result<(), Error>

fn start_read_bytes_dma<'w>( &mut self, ptr: *mut u8, len: usize, rx: &mut RX, listen: bool ) -> Result<(), Error>

fn dma_peripheral(&self) -> DmaPeripheral

fn enable_dma(&self)

fn clear_dma_interrupts(&self)

impl Peripheral for SPI3

type P = SPI3

Peripheral singleton type

unsafe fn clone_unchecked(&mut self) -> <SPI3 as Peripheral>::P

Unsafely clone (duplicate) a peripheral singleton.

fn into_ref<'a>(self) -> PeripheralRef<'a, Self::P>

where Self: 'a,

Convert a value into a PeripheralRef.