Enum esp32_hal::gpio::InputSignal
source · pub enum InputSignal {
Show 214 variants
SPICLK,
SPIQ,
SPID,
SPIHD,
SPIWP,
SPICS0,
SPICS1,
SPICS2,
HSPICLK,
HSPIQ,
HSPID,
HSPICS0,
HSPIHD,
HSPIWP,
U0RXD,
U0CTS,
U0DSR,
U1RXD,
U1CTS,
I2CM_SDA,
EXT_I2C_SDA,
I2S0O_BCK,
I2S1O_BCK,
I2S0O_WS,
I2S1O_WS,
I2S0I_BCK,
I2S0I_WS,
I2CEXT0_SCL,
I2CEXT0_SDA,
PWM0_SYNC0,
PWM0_SYNC1,
PWM0_SYNC2,
PWM0_F0,
PWM0_F1,
PWM0_F2,
GPIO_BT_ACTIVE,
GPIO_BT_PRIORITY,
PCNT0_SIG_CH0,
PCNT0_SIG_CH1,
PCNT0_CTRL_CH0,
PCNT0_CTRL_CH1,
PCNT1_SIG_CH0,
PCNT1_SIG_CH1,
PCNT1_CTRL_CH0,
PCNT1_CTRL_CH1,
PCNT2_SIG_CH0,
PCNT2_SIG_CH1,
PCNT2_CTRL_CH0,
PCNT2_CTRL_CH1,
PCNT3_SIG_CH0,
PCNT3_SIG_CH1,
PCNT3_CTRL_CH0,
PCNT3_CTRL_CH1,
PCNT4_SIG_CH0,
PCNT4_SIG_CH1,
PCNT4_CTRL_CH0,
PCNT4_CTRL_CH1,
HSPICS1,
HSPICS2,
VSPICLK,
VSPIQ,
VSPID,
VSPIHD,
VSPIWP,
VSPICS0,
VSPICS1,
VSPICS2,
PCNT5_SIG_CH0,
PCNT5_SIG_CH1,
PCNT5_CTRL_CH0,
PCNT5_CTRL_CH1,
PCNT6_SIG_CH0,
PCNT6_SIG_CH1,
PCNT6_CTRL_CH0,
PCNT6_CTRL_CH1,
PCNT7_SIG_CH0,
PCNT7_SIG_CH1,
PCNT7_CTRL_CH0,
PCNT7_CTRL_CH1,
RMT_SIG_0,
RMT_SIG_1,
RMT_SIG_2,
RMT_SIG_3,
RMT_SIG_4,
RMT_SIG_5,
RMT_SIG_6,
RMT_SIG_7,
EXT_ADC_START,
CAN_RX,
I2CEXT1_SCL,
I2CEXT1_SDA,
HOST_CARD_DETECT_N_1,
HOST_CARD_DETECT_N_2,
HOST_CARD_WRITE_PRT_1,
HOST_CARD_WRITE_PRT_2,
HOST_CARD_INT_N_1,
HOST_CARD_INT_N_2,
PWM1_SYNC0,
PWM1_SYNC1,
PWM1_SYNC2,
PWM1_F0,
PWM1_F1,
PWM1_F2,
PWM0_CAP0,
PWM0_CAP1,
PWM0_CAP2,
PWM1_CAP0,
PWM1_CAP1,
PWM1_CAP2,
PWM2_FLTA,
PWM2_FLTB,
PWM2_CAP1,
PWM2_CAP2,
PWM2_CAP3,
PWM3_FLTA,
PWM3_FLTB,
PWM3_CAP1,
PWM3_CAP2,
PWM3_CAP3,
CAN_CLKOUT,
SPID4,
SPID5,
SPID6,
SPID7,
HSPID4,
HSPID5,
HSPID6,
HSPID7,
VSPID4,
VSPID5,
VSPID6,
VSPID7,
I2S0I_DATA_0,
I2S0I_DATA_1,
I2S0I_DATA_2,
I2S0I_DATA_3,
I2S0I_DATA_4,
I2S0I_DATA_5,
I2S0I_DATA_6,
I2S0I_DATA_7,
I2S0I_DATA_8,
I2S0I_DATA_9,
I2S0I_DATA_10,
I2S0I_DATA_11,
I2S0I_DATA_12,
I2S0I_DATA_13,
I2S0I_DATA_14,
I2S0I_DATA_15,
I2S1I_BCK,
I2S1I_WS,
I2S1I_DATA_0,
I2S1I_DATA_1,
I2S1I_DATA_2,
I2S1I_DATA_3,
I2S1I_DATA_4,
I2S1I_DATA_5,
I2S1I_DATA_6,
I2S1I_DATA_7,
I2S1I_DATA_8,
I2S1I_DATA_9,
I2S1I_DATA_10,
I2S1I_DATA_11,
I2S1I_DATA_12,
I2S1I_DATA_13,
I2S1I_DATA_14,
I2S1I_DATA_15,
I2S0I_H_SYNC,
I2S0I_V_SYNC,
I2S0I_H_ENABLE,
I2S1I_H_SYNC,
I2S1I_V_SYNC,
I2S1I_H_ENABLE,
U2RXD,
U2CTS,
EMAC_MDC,
EMAC_MDI,
EMAC_CRS,
EMAC_COL,
PCMFSYNC,
PCMCLK,
PCMDIN,
SIG_IN_FUNC224,
SIG_IN_FUNC225,
SIG_IN_FUNC226,
SIG_IN_FUNC227,
SIG_IN_FUNC228,
SD_DATA0,
SD_DATA1,
SD_DATA2,
SD_DATA3,
HS1_DATA0,
HS1_DATA1,
HS1_DATA2,
HS1_DATA3,
HS1_DATA4,
HS1_DATA5,
HS1_DATA6,
HS1_DATA7,
HS2_DATA0,
HS2_DATA1,
HS2_DATA2,
HS2_DATA3,
EMAC_TX_CLK,
EMAC_RXD2,
EMAC_TX_ER,
EMAC_RX_CLK,
EMAC_RX_ER,
EMAC_RXD3,
EMAC_RXD0,
EMAC_RXD1,
EMAC_RX_DV,
MTDI,
MTCK,
MTMS,
}
Expand description
Peripheral input signals for the GPIO mux
Variants§
SPICLK
SPIQ
SPID
SPIHD
SPIWP
SPICS0
SPICS1
SPICS2
HSPICLK
HSPIQ
HSPID
HSPICS0
HSPIHD
HSPIWP
U0RXD
U0CTS
U0DSR
U1RXD
U1CTS
I2CM_SDA
EXT_I2C_SDA
I2S0O_BCK
I2S1O_BCK
I2S0O_WS
I2S1O_WS
I2S0I_BCK
I2S0I_WS
I2CEXT0_SCL
I2CEXT0_SDA
PWM0_SYNC0
PWM0_SYNC1
PWM0_SYNC2
PWM0_F0
PWM0_F1
PWM0_F2
GPIO_BT_ACTIVE
GPIO_BT_PRIORITY
PCNT0_SIG_CH0
PCNT0_SIG_CH1
PCNT0_CTRL_CH0
PCNT0_CTRL_CH1
PCNT1_SIG_CH0
PCNT1_SIG_CH1
PCNT1_CTRL_CH0
PCNT1_CTRL_CH1
PCNT2_SIG_CH0
PCNT2_SIG_CH1
PCNT2_CTRL_CH0
PCNT2_CTRL_CH1
PCNT3_SIG_CH0
PCNT3_SIG_CH1
PCNT3_CTRL_CH0
PCNT3_CTRL_CH1
PCNT4_SIG_CH0
PCNT4_SIG_CH1
PCNT4_CTRL_CH0
PCNT4_CTRL_CH1
HSPICS1
HSPICS2
VSPICLK
VSPIQ
VSPID
VSPIHD
VSPIWP
VSPICS0
VSPICS1
VSPICS2
PCNT5_SIG_CH0
PCNT5_SIG_CH1
PCNT5_CTRL_CH0
PCNT5_CTRL_CH1
PCNT6_SIG_CH0
PCNT6_SIG_CH1
PCNT6_CTRL_CH0
PCNT6_CTRL_CH1
PCNT7_SIG_CH0
PCNT7_SIG_CH1
PCNT7_CTRL_CH0
PCNT7_CTRL_CH1
RMT_SIG_0
RMT_SIG_1
RMT_SIG_2
RMT_SIG_3
RMT_SIG_4
RMT_SIG_5
RMT_SIG_6
RMT_SIG_7
EXT_ADC_START
CAN_RX
I2CEXT1_SCL
I2CEXT1_SDA
HOST_CARD_DETECT_N_1
HOST_CARD_DETECT_N_2
HOST_CARD_WRITE_PRT_1
HOST_CARD_WRITE_PRT_2
HOST_CARD_INT_N_1
HOST_CARD_INT_N_2
PWM1_SYNC0
PWM1_SYNC1
PWM1_SYNC2
PWM1_F0
PWM1_F1
PWM1_F2
PWM0_CAP0
PWM0_CAP1
PWM0_CAP2
PWM1_CAP0
PWM1_CAP1
PWM1_CAP2
PWM2_FLTA
PWM2_FLTB
PWM2_CAP1
PWM2_CAP2
PWM2_CAP3
PWM3_FLTA
PWM3_FLTB
PWM3_CAP1
PWM3_CAP2
PWM3_CAP3
CAN_CLKOUT
SPID4
SPID5
SPID6
SPID7
HSPID4
HSPID5
HSPID6
HSPID7
VSPID4
VSPID5
VSPID6
VSPID7
I2S0I_DATA_0
I2S0I_DATA_1
I2S0I_DATA_2
I2S0I_DATA_3
I2S0I_DATA_4
I2S0I_DATA_5
I2S0I_DATA_6
I2S0I_DATA_7
I2S0I_DATA_8
I2S0I_DATA_9
I2S0I_DATA_10
I2S0I_DATA_11
I2S0I_DATA_12
I2S0I_DATA_13
I2S0I_DATA_14
I2S0I_DATA_15
I2S1I_BCK
I2S1I_WS
I2S1I_DATA_0
I2S1I_DATA_1
I2S1I_DATA_2
I2S1I_DATA_3
I2S1I_DATA_4
I2S1I_DATA_5
I2S1I_DATA_6
I2S1I_DATA_7
I2S1I_DATA_8
I2S1I_DATA_9
I2S1I_DATA_10
I2S1I_DATA_11
I2S1I_DATA_12
I2S1I_DATA_13
I2S1I_DATA_14
I2S1I_DATA_15
I2S0I_H_SYNC
I2S0I_V_SYNC
I2S0I_H_ENABLE
I2S1I_H_SYNC
I2S1I_V_SYNC
I2S1I_H_ENABLE
U2RXD
U2CTS
EMAC_MDC
EMAC_MDI
EMAC_CRS
EMAC_COL
PCMFSYNC
PCMCLK
PCMDIN
SIG_IN_FUNC224
SIG_IN_FUNC225
SIG_IN_FUNC226
SIG_IN_FUNC227
SIG_IN_FUNC228
SD_DATA0
SD_DATA1
SD_DATA2
SD_DATA3
HS1_DATA0
HS1_DATA1
HS1_DATA2
HS1_DATA3
HS1_DATA4
HS1_DATA5
HS1_DATA6
HS1_DATA7
HS2_DATA0
HS2_DATA1
HS2_DATA2
HS2_DATA3
EMAC_TX_CLK
EMAC_RXD2
EMAC_TX_ER
EMAC_RX_CLK
EMAC_RX_ER
EMAC_RXD3
EMAC_RXD0
EMAC_RXD1
EMAC_RX_DV
MTDI
MTCK
MTMS
Trait Implementations§
source§impl Clone for InputSignal
impl Clone for InputSignal
source§fn clone(&self) -> InputSignal
fn clone(&self) -> InputSignal
Returns a copy of the value. Read more
1.0.0 · source§fn clone_from(&mut self, source: &Self)
fn clone_from(&mut self, source: &Self)
Performs copy-assignment from
source
. Read moresource§impl PartialEq<InputSignal> for InputSignal
impl PartialEq<InputSignal> for InputSignal
source§fn eq(&self, other: &InputSignal) -> bool
fn eq(&self, other: &InputSignal) -> bool
This method tests for
self
and other
values to be equal, and is used
by ==
.