pub struct SPI2 { /* private fields */ }Expand description
Represents a virtual peripheral with no associated hardware.
This struct is generated by the create_peripheral! macro when the peripheral
is defined as virtual.
Implementations§
Methods from Deref<Target = RegisterBlock>§
Sourcepub fn clock(&self) -> &Reg<CLOCK_SPEC>
pub fn clock(&self) -> &Reg<CLOCK_SPEC>
0x0c - SPI clock control register
Sourcepub fn user1(&self) -> &Reg<USER1_SPEC>
pub fn user1(&self) -> &Reg<USER1_SPEC>
0x14 - SPI USER control register 1
Sourcepub fn user2(&self) -> &Reg<USER2_SPEC>
pub fn user2(&self) -> &Reg<USER2_SPEC>
0x18 - SPI USER control register 2
Sourcepub fn ms_dlen(&self) -> &Reg<MS_DLEN_SPEC>
pub fn ms_dlen(&self) -> &Reg<MS_DLEN_SPEC>
0x1c - SPI data bit length control register
Sourcepub fn din_mode(&self) -> &Reg<DIN_MODE_SPEC>
pub fn din_mode(&self) -> &Reg<DIN_MODE_SPEC>
0x24 - SPI input delay mode configuration
Sourcepub fn din_num(&self) -> &Reg<DIN_NUM_SPEC>
pub fn din_num(&self) -> &Reg<DIN_NUM_SPEC>
0x28 - SPI input delay number configuration
Sourcepub fn dout_mode(&self) -> &Reg<DOUT_MODE_SPEC>
pub fn dout_mode(&self) -> &Reg<DOUT_MODE_SPEC>
0x2c - SPI output delay mode configuration
Sourcepub fn dma_conf(&self) -> &Reg<DMA_CONF_SPEC>
pub fn dma_conf(&self) -> &Reg<DMA_CONF_SPEC>
0x30 - SPI DMA control register
Sourcepub fn dma_int_ena(&self) -> &Reg<DMA_INT_ENA_SPEC>
pub fn dma_int_ena(&self) -> &Reg<DMA_INT_ENA_SPEC>
0x34 - SPI interrupt enable register
Sourcepub fn dma_int_clr(&self) -> &Reg<DMA_INT_CLR_SPEC>
pub fn dma_int_clr(&self) -> &Reg<DMA_INT_CLR_SPEC>
0x38 - SPI interrupt clear register
Sourcepub fn dma_int_raw(&self) -> &Reg<DMA_INT_RAW_SPEC>
pub fn dma_int_raw(&self) -> &Reg<DMA_INT_RAW_SPEC>
0x3c - SPI interrupt raw register
Sourcepub fn dma_int_st(&self) -> &Reg<DMA_INT_ST_SPEC>
pub fn dma_int_st(&self) -> &Reg<DMA_INT_ST_SPEC>
0x40 - SPI interrupt status register
Sourcepub fn dma_int_set(&self) -> &Reg<DMA_INT_SET_SPEC>
pub fn dma_int_set(&self) -> &Reg<DMA_INT_SET_SPEC>
0x44 - SPI interrupt software set register
Sourcepub fn w_iter(&self) -> impl Iterator<Item = &Reg<W_SPEC>>
pub fn w_iter(&self) -> impl Iterator<Item = &Reg<W_SPEC>>
Iterator for array of: 0x98..0xd8 - SPI CPU-controlled buffer%s
Sourcepub fn slave(&self) -> &Reg<SLAVE_SPEC>
pub fn slave(&self) -> &Reg<SLAVE_SPEC>
0xe0 - SPI slave control register
Sourcepub fn slave1(&self) -> &Reg<SLAVE1_SPEC>
pub fn slave1(&self) -> &Reg<SLAVE1_SPEC>
0xe4 - SPI slave control register 1
Sourcepub fn clk_gate(&self) -> &Reg<CLK_GATE_SPEC>
pub fn clk_gate(&self) -> &Reg<CLK_GATE_SPEC>
0xe8 - SPI module clock and register clock control