pub struct MCPWM0 { /* private fields */ }Expand description
Represents a virtual peripheral with no associated hardware.
This struct is generated by the create_peripheral! macro when the peripheral
is defined as virtual.
Implementations§
Methods from Deref<Target = RegisterBlock>§
Sourcepub fn clk_cfg(&self) -> &Reg<CLK_CFG_SPEC>
pub fn clk_cfg(&self) -> &Reg<CLK_CFG_SPEC>
0x00 - PWM clock prescaler register.
Sourcepub fn timer(&self, n: usize) -> &TIMER
pub fn timer(&self, n: usize) -> &TIMER
0x04..0x34 - Cluster TIMER%s, containing TIMER?_CFG0, TIMER?_CFG1, TIMER?_SYNC, TIMER?_STATUS
Sourcepub fn timer_iter(&self) -> impl Iterator<Item = &TIMER>
pub fn timer_iter(&self) -> impl Iterator<Item = &TIMER>
Iterator for array of: 0x04..0x34 - Cluster TIMER%s, containing TIMER?_CFG0, TIMER?_CFG1, TIMER?_SYNC, TIMER?_STATUS
Sourcepub fn timer_synci_cfg(&self) -> &Reg<TIMER_SYNCI_CFG_SPEC>
pub fn timer_synci_cfg(&self) -> &Reg<TIMER_SYNCI_CFG_SPEC>
0x34 - Synchronization input selection for three PWM timers.
Sourcepub fn operator_timersel(&self) -> &Reg<OPERATOR_TIMERSEL_SPEC>
pub fn operator_timersel(&self) -> &Reg<OPERATOR_TIMERSEL_SPEC>
0x38 - Select specific timer for PWM operators.
Sourcepub fn ch(&self, n: usize) -> &CH
pub fn ch(&self, n: usize) -> &CH
0x3c..0xe4 - Cluster CH%s, containing GEN?_STMP_CFG, GEN?_TSTMP_A, GEN?_TSTMP_B, GEN?_CFG0, GEN?_FORCE, GEN?_A, GEN?_B, DT?_CFG, DT?_FED_CFG, DT?_RED_CFG, CARRIER?_CFG, FH?_CFG0, FH?_CFG1, FH?_STATUS
Sourcepub fn ch_iter(&self) -> impl Iterator<Item = &CH>
pub fn ch_iter(&self) -> impl Iterator<Item = &CH>
Iterator for array of: 0x3c..0xe4 - Cluster CH%s, containing GEN?_STMP_CFG, GEN?_TSTMP_A, GEN?_TSTMP_B, GEN?_CFG0, GEN?_FORCE, GEN?_A, GEN?_B, DT?_CFG, DT?_FED_CFG, DT?_RED_CFG, CARRIER?_CFG, FH?_CFG0, FH?_CFG1, FH?_STATUS
Sourcepub fn fault_detect(&self) -> &Reg<FAULT_DETECT_SPEC>
pub fn fault_detect(&self) -> &Reg<FAULT_DETECT_SPEC>
0xe4 - Fault detection configuration and status
Sourcepub fn cap_timer_cfg(&self) -> &Reg<CAP_TIMER_CFG_SPEC>
pub fn cap_timer_cfg(&self) -> &Reg<CAP_TIMER_CFG_SPEC>
0xe8 - Configure capture timer
Sourcepub fn cap_timer_phase(&self) -> &Reg<CAP_TIMER_PHASE_SPEC>
pub fn cap_timer_phase(&self) -> &Reg<CAP_TIMER_PHASE_SPEC>
0xec - Phase for capture timer sync
Sourcepub fn cap_ch_cfg(&self, n: usize) -> &Reg<CAP_CH_CFG_SPEC>
pub fn cap_ch_cfg(&self, n: usize) -> &Reg<CAP_CH_CFG_SPEC>
0xf0..0xfc - Capture channel %s configuration and enable
Sourcepub fn cap_ch_cfg_iter(&self) -> impl Iterator<Item = &Reg<CAP_CH_CFG_SPEC>>
pub fn cap_ch_cfg_iter(&self) -> impl Iterator<Item = &Reg<CAP_CH_CFG_SPEC>>
Iterator for array of: 0xf0..0xfc - Capture channel %s configuration and enable
Sourcepub fn cap_ch0_cfg(&self) -> &Reg<CAP_CH_CFG_SPEC>
pub fn cap_ch0_cfg(&self) -> &Reg<CAP_CH_CFG_SPEC>
0xf0 - Capture channel 0 configuration and enable
Sourcepub fn cap_ch1_cfg(&self) -> &Reg<CAP_CH_CFG_SPEC>
pub fn cap_ch1_cfg(&self) -> &Reg<CAP_CH_CFG_SPEC>
0xf4 - Capture channel 1 configuration and enable
Sourcepub fn cap_ch2_cfg(&self) -> &Reg<CAP_CH_CFG_SPEC>
pub fn cap_ch2_cfg(&self) -> &Reg<CAP_CH_CFG_SPEC>
0xf8 - Capture channel 2 configuration and enable
Sourcepub fn cap_ch(&self, n: usize) -> &Reg<CAP_CH_SPEC>
pub fn cap_ch(&self, n: usize) -> &Reg<CAP_CH_SPEC>
0xfc..0x108 - Value of last capture on channel %s
Sourcepub fn cap_ch_iter(&self) -> impl Iterator<Item = &Reg<CAP_CH_SPEC>>
pub fn cap_ch_iter(&self) -> impl Iterator<Item = &Reg<CAP_CH_SPEC>>
Iterator for array of: 0xfc..0x108 - Value of last capture on channel %s
Sourcepub fn cap_status(&self) -> &Reg<CAP_STATUS_SPEC>
pub fn cap_status(&self) -> &Reg<CAP_STATUS_SPEC>
0x108 - Edge of last capture trigger
Sourcepub fn update_cfg(&self) -> &Reg<UPDATE_CFG_SPEC>
pub fn update_cfg(&self) -> &Reg<UPDATE_CFG_SPEC>
0x10c - Enable update.
Sourcepub fn int_ena(&self) -> &Reg<INT_ENA_SPEC>
pub fn int_ena(&self) -> &Reg<INT_ENA_SPEC>
0x110 - Interrupt enable bits
Sourcepub fn int_raw(&self) -> &Reg<INT_RAW_SPEC>
pub fn int_raw(&self) -> &Reg<INT_RAW_SPEC>
0x114 - Raw interrupt status
Sourcepub fn int_st(&self) -> &Reg<INT_ST_SPEC>
pub fn int_st(&self) -> &Reg<INT_ST_SPEC>
0x118 - Masked interrupt status
Sourcepub fn int_clr(&self) -> &Reg<INT_CLR_SPEC>
pub fn int_clr(&self) -> &Reg<INT_CLR_SPEC>
0x11c - Interrupt clear bits
Sourcepub fn evt_en(&self) -> &Reg<EVT_EN_SPEC>
pub fn evt_en(&self) -> &Reg<EVT_EN_SPEC>
0x120 - MCPWM event enable register
Sourcepub fn task_en(&self) -> &Reg<TASK_EN_SPEC>
pub fn task_en(&self) -> &Reg<TASK_EN_SPEC>
0x124 - MCPWM task enable register
Sourcepub fn version(&self) -> &Reg<VERSION_SPEC>
pub fn version(&self) -> &Reg<VERSION_SPEC>
0x12c - Version register.