pub struct LP_I2C0 { /* private fields */ }Expand description
Represents a virtual peripheral with no associated hardware.
This struct is generated by the create_peripheral! macro when the peripheral
is defined as virtual.
Implementations§
Methods from Deref<Target = RegisterBlock>§
Sourcepub fn scl_low_period(&self) -> &Reg<SCL_LOW_PERIOD_SPEC>
pub fn scl_low_period(&self) -> &Reg<SCL_LOW_PERIOD_SPEC>
0x00 - Configures the low level width of the SCL Clock
Sourcepub fn fifo_st(&self) -> &Reg<FIFO_ST_SPEC>
pub fn fifo_st(&self) -> &Reg<FIFO_ST_SPEC>
0x14 - FIFO status register.
Sourcepub fn fifo_conf(&self) -> &Reg<FIFO_CONF_SPEC>
pub fn fifo_conf(&self) -> &Reg<FIFO_CONF_SPEC>
0x18 - FIFO configuration register.
Sourcepub fn int_raw(&self) -> &Reg<INT_RAW_SPEC>
pub fn int_raw(&self) -> &Reg<INT_RAW_SPEC>
0x20 - Raw interrupt status
Sourcepub fn int_clr(&self) -> &Reg<INT_CLR_SPEC>
pub fn int_clr(&self) -> &Reg<INT_CLR_SPEC>
0x24 - Interrupt clear bits
Sourcepub fn int_ena(&self) -> &Reg<INT_ENA_SPEC>
pub fn int_ena(&self) -> &Reg<INT_ENA_SPEC>
0x28 - Interrupt enable bits
Sourcepub fn int_st(&self) -> &Reg<INT_ST_SPEC>
pub fn int_st(&self) -> &Reg<INT_ST_SPEC>
0x2c - Status of captured I2C communication events
Sourcepub fn sda_hold(&self) -> &Reg<SDA_HOLD_SPEC>
pub fn sda_hold(&self) -> &Reg<SDA_HOLD_SPEC>
0x30 - Configures the hold time after a negative SCL edge.
Sourcepub fn sda_sample(&self) -> &Reg<SDA_SAMPLE_SPEC>
pub fn sda_sample(&self) -> &Reg<SDA_SAMPLE_SPEC>
0x34 - Configures the sample time after a positive SCL edge.
Sourcepub fn scl_high_period(&self) -> &Reg<SCL_HIGH_PERIOD_SPEC>
pub fn scl_high_period(&self) -> &Reg<SCL_HIGH_PERIOD_SPEC>
0x38 - Configures the high level width of SCL
Sourcepub fn scl_start_hold(&self) -> &Reg<SCL_START_HOLD_SPEC>
pub fn scl_start_hold(&self) -> &Reg<SCL_START_HOLD_SPEC>
0x40 - Configures the delay between the SDA and SCL negative edge for a start condition
Sourcepub fn scl_rstart_setup(&self) -> &Reg<SCL_RSTART_SETUP_SPEC>
pub fn scl_rstart_setup(&self) -> &Reg<SCL_RSTART_SETUP_SPEC>
0x44 - Configures the delay between the positive edge of SCL and the negative edge of SDA
Sourcepub fn scl_stop_hold(&self) -> &Reg<SCL_STOP_HOLD_SPEC>
pub fn scl_stop_hold(&self) -> &Reg<SCL_STOP_HOLD_SPEC>
0x48 - Configures the delay after the SCL clock edge for a stop condition
Sourcepub fn scl_stop_setup(&self) -> &Reg<SCL_STOP_SETUP_SPEC>
pub fn scl_stop_setup(&self) -> &Reg<SCL_STOP_SETUP_SPEC>
0x4c - Configures the delay between the SDA and SCL positive edge for a stop condition
Sourcepub fn filter_cfg(&self) -> &Reg<FILTER_CFG_SPEC>
pub fn filter_cfg(&self) -> &Reg<FILTER_CFG_SPEC>
0x50 - SCL and SDA filter configuration register
Sourcepub fn clk_conf(&self) -> &Reg<CLK_CONF_SPEC>
pub fn clk_conf(&self) -> &Reg<CLK_CONF_SPEC>
0x54 - I2C CLK configuration register
Sourcepub fn comd_iter(&self) -> impl Iterator<Item = &Reg<COMD_SPEC>>
pub fn comd_iter(&self) -> impl Iterator<Item = &Reg<COMD_SPEC>>
Iterator for array of: 0x58..0x78 - I2C command register %s
Sourcepub fn scl_st_time_out(&self) -> &Reg<SCL_ST_TIME_OUT_SPEC>
pub fn scl_st_time_out(&self) -> &Reg<SCL_ST_TIME_OUT_SPEC>
0x78 - SCL status time out register
Sourcepub fn scl_main_st_time_out(&self) -> &Reg<SCL_MAIN_ST_TIME_OUT_SPEC>
pub fn scl_main_st_time_out(&self) -> &Reg<SCL_MAIN_ST_TIME_OUT_SPEC>
0x7c - SCL main status time out register
Sourcepub fn scl_sp_conf(&self) -> &Reg<SCL_SP_CONF_SPEC>
pub fn scl_sp_conf(&self) -> &Reg<SCL_SP_CONF_SPEC>
0x80 - Power configuration register
Sourcepub fn txfifo_start_addr(&self) -> &Reg<TXFIFO_START_ADDR_SPEC>
pub fn txfifo_start_addr(&self) -> &Reg<TXFIFO_START_ADDR_SPEC>
0x100 - I2C TXFIFO base address register
Sourcepub fn rxfifo_start_addr(&self) -> &Reg<RXFIFO_START_ADDR_SPEC>
pub fn rxfifo_start_addr(&self) -> &Reg<RXFIFO_START_ADDR_SPEC>
0x180 - I2C RXFIFO base address register