Expand description
You might want to browse the esp-hal documentation on the esp-rs website instead.
The documentation here on docs.rs is built for a single chip only (ESP32-C6, in particular), while on the esp-rs website you can select your exact chip from the list of supported devices. Available peripherals and their APIs change depending on the chip.
Bare-metal (no_std) HAL for Espressif devices. Implements most of the
traits defined by various packages in the embedded-hal repository.
§Feature Flags
debug— Enable debug features in the HAL (used for development).log— Enable logging output using thelogcrate.rt(enabled by default) — Enable runtime support.vectored(enabled by default) — Enable interrupt vectoring.
§Chip Support Feature Flags
esp32— Target the ESP32.esp32c2— Target the ESP32-C2.esp32c3— Target the ESP32-C3.esp32c6— Target the ESP32-C6.esp32h2— Target the ESP32-H2.esp32p4— Target the ESP32-P4.esp32s2— Target the ESP32-S2.esp32s3— Target the ESP32-S3.
§RISC-V Exclusive Feature Flags
direct-vectoring— Enable direct interrupt vectoring.flip-link— Move the stack to start of RAM to get zero-cost stack overflow protection (ESP32-C6 and ESPS32-H2 only!).interrupt-preemption— Enable interrupt preemption.place-spi-driver-in-ram— Configuration for placing device drivers in the IRAM for faster access.rv-init-data— Initialize the.datasection of memory.rv-zero-rtc-bss— Zero the.bsssection of low-power memory.rv-init-rtc-data— Initialize the.datasection of low-power memory.
§Trait Implementation Feature Flags
async— Enable support for asynchronous operation, with interfaces provided byembedded-hal-asyncandembedded-io-async.defmt— Implementdefmt::Formaton certain types.eh1— Implement the traits defined in the1.0.0releases ofembedded-halandembedded-hal-nbfor the relevant peripherals.embedded-io— Implement the traits defined inembedded-iofor certain peripherals.ufmt— Implement theufmt_write::uWritetrait for certain peripherals.
§Embassy Feature Flags
embassy— Enable support forembassy, a modern asynchronous embedded framework.embassy-executor-interrupt— Use the interrupt-mode embassy executor.embassy-executor-thread— Use the thread-mode embassy executor.embassy-integrated-timers— Uses hardware timers as alarms for the executors. Using this feature limits the number of executors to the number of hardware alarms provided by the time driver.embassy-time-systick-16mhz— Enable the embassy time driver using theSYSTIMERperipheral. TheSYSTIMERperipheral has three alarams available for use. Do not use when targeting anesp32s2.embassy-time-systick-80mhz— Enable the embassy time driver using theSYSTIMERperipheral. TheSYSTIMERperipheral has three alarams available for use. Must only be used when targeting anesp32s2.embassy-time-timg0— Enable the embassy time driver using theTIMG0peripheral. TheTIMG0peripheral has two alarms available for use.
§PSRAM Feature Flags
psram-2m— Use externally connected PSRAM (2MB).psram-4m— Use externally connected PSRAM (4MB).psram-8m— Use externally connected PSRAM (8MB).psram-80mhz— PSRAM 80Mhz frequency support
§Octal RAM Feature Flags
opsram-2m— Use externally connected Octal RAM (2MB).opsram-4m— Use externally connected Octal RAM (4MB).opsram-8m— Use externally connected Octal RAM (8MB).opsram-16m— Use externally connected Octal RAM (16MB).
Re-exports§
pub use self::analog::adc;pub use self::delay::Delay;pub use self::gpio::IO;pub use self::rmt::Rmt;pub use self::rng::Rng;pub use self::rtc_cntl::Rtc;pub use self::rtc_cntl::Rwdt;pub use self::timer::Timer;pub use self::uart::Uart;pub use self::uart::UartRx;pub use self::uart::UartTx;pub use self::usb_serial_jtag::UsbSerialJtag;pub use esp_riscv_rt;pub use procmacros as macros;pub use riscv;
Modules§
- Advanced Encryption Standard (AES) support.
- Analog Peripherals
- Debug Assistant
- Clock Control
- Delay driver
- Direct Memory Access Commons
- ECC Accelerator
- Reading of eFuses (ESP32-C6)
- Event Task Matrix (ETM)
- General Purpose I/Os
- HMAC Accelerator
- I2C Driver
- I2S Master
- Interrupt support
- LEDC (LED PWM Controller) peripheral control
- Control the LP core
- MCPWM (Motor Control Pulse Width Modulator) peripheral
- Parallel IO
- Pulse Counter peripheral driver
- Exclusive peripheral access
- Peripheral Instances
- The prelude
- Hardware and Software Reset
- Remote Control Peripheral (RMT)
- Random Number Generator
- ESP ROM libraries
- RSA Accelerator support.
- RTC_CNTL (Real-Time Clock Control) and Low-power Management
- Secure Hash Algorithm peripheral driver
- Serial Peripheral Interface
- System Control
- System Timer peripheral driver
- General-purpose timers
- RISCV Trace Encoder (TRACE)
- State of the CPU saved when entering exception or interrupt
- Two-wire Automotive Interface (TWAI)
- UART driver
- USB Serial JTAG peripheral driver
Macros§
- Convenience macro to create DMA buffers and descriptors
- Convenience macro to create circular DMA buffers and descriptors
- Convenience macro to create circular DMA descriptors
- Convenience macro to create DMA descriptors
Structs§
- FlashSafeDma
Enums§
- Available CPU cores
Functions§
- Which core the application is currently executing on
Attribute Macros§
- Attribute to declare the entry point of the program