Struct DmaEngine 

pub struct DmaEngine<const RX: usize, const TX: usize, const BUF: usize> { /* private fields */ }

DMA engine with statically allocated buffers.

Const generics

• RX: number of RX descriptors/buffers
• TX: number of TX descriptors/buffers
• BUF: buffer size per descriptor (bytes)

Implementations

impl<const RX: usize, const TX: usize, const BUF: usize> DmaEngine<RX, TX, BUF>

pub const fn new() -> Self

Create a new DMA engine (all zeroed, not yet initialized).

pub fn init(&mut self) -> (u32, u32)

Initialize descriptor chains.

Sets up chained descriptors: each points to its buffer and the next descriptor. The last descriptor chains back to the first (circular).

Returns (rx_base_addr, tx_base_addr) for programming DMA registers.

pub fn is_initialized(&self) -> bool

Check if initialized.

pub const fn memory_usage() -> usize

Calculate total static memory usage in bytes.

pub fn can_transmit(&self, len: usize) -> bool

Check if there’s room to transmit a frame of given length.

pub fn tx_available(&self) -> usize

Count available (CPU-owned) TX descriptors starting from current.

pub fn transmit(&mut self, data: &[u8]) -> Result<usize, EmacError>

Submit a frame for transmission. Returns number of bytes sent.

For frames larger than BUF, uses multiple descriptors (scatter-gather). Descriptors are given to DMA in reverse order to prevent a race where the DMA starts processing before all descriptors are ready.

pub fn tx_reclaim(&mut self) -> usize

Reclaim completed TX descriptors (return from DMA to CPU ownership).

Returns the number of descriptors reclaimed.

pub fn rx_available(&self) -> bool

Check if there is something for receive to do on the current descriptor. Returns true when:

• the current descriptor is CPU-owned and carries an error flag (CRC, overflow, etc.) — receive will recycle it as part of its error path, so the driver still needs to be woken; or
• a complete (possibly multi-descriptor) frame is available, as determined by peek_frame_length.

Two earlier implementations both had bugs:

1. !current.is_owned() && current.is_last() missed multi- descriptor frames whose head wasn’t itself LAST.
2. peek_frame_length().is_some() fixed (1) but missed error frames (peek declines to report a length for them), so the embassy-net driver never called receive to flush a CRC-failed frame — RX would wedge as the ring filled with untouched error descriptors.

pub fn receive(&mut self, buffer: &mut [u8]) -> Result<Option<usize>, EmacError>

Receive a frame into the provided buffer.

Returns the number of bytes received, or None if no frame is ready. For single-descriptor frames, copies payload from the RX buffer. For multi-descriptor frames, copies from each descriptor’s buffer.

pub fn peek_frame_length(&self) -> Option<usize>

Get the length of the next available frame without consuming it.

pub fn rx_free_count(&self) -> usize

Count free RX descriptors (owned by DMA, ready to receive).

pub fn reset(&mut self) -> (u32, u32)

Reset all descriptors to initial state.

Re-initializes the chains and returns base addresses.

pub fn rx_ring_base(&self) -> u32

RX ring base address (for debugging).

pub fn tx_ring_base(&self) -> u32

TX ring base address (for debugging).

pub fn rx_current_index(&self) -> usize

Current RX ring index.

pub fn tx_current_index(&self) -> usize

Current TX ring index.

Trait Implementations

impl<const RX: usize, const TX: usize, const BUF: usize> Default for DmaEngine<RX, TX, BUF>

fn default() -> Self

Returns the “default value” for a type.

impl<const RX: usize, const TX: usize, const BUF: usize> Send for DmaEngine<RX, TX, BUF>

impl<const RX: usize, const TX: usize, const BUF: usize> Sync for DmaEngine<RX, TX, BUF>