[−][src]Trait emul8::internals::opcode::Opcode

pub trait Opcode: Debug + Display + Downcast {
    fn execute(&self, processor: &mut Processor);

    fn modified_pc(&self) -> bool { ... }
    fn assemble(&self) -> (u8, u8) { ... }
}

Required methods

`fn execute(&self, processor: &mut Processor)`

Loading content...

Provided methods

`fn modified_pc(&self) -> bool`

`fn assemble(&self) -> (u8, u8)`

Loading content...

Methods

`impl dyn Opcode`

`pub fn is<__T: Opcode>(&self) -> bool`

Returns true if the trait object wraps an object of type __T.

`pub fn downcast<T: Opcode>(self: Box<Self>) -> Result<Box<T>, Box<Self>>`

Returns a boxed object from a boxed trait object if the underlying object is of type __T. Returns the original boxed trait if it isn't.

`pub fn downcast_rc<T: Opcode>(self: Rc<Self>) -> Result<Rc<T>, Rc<Self>>`

Returns an Rc-ed object from an Rc-ed trait object if the underlying object is of type __T. Returns the original Rc-ed trait if it isn't.

`pub fn downcast_ref<T: Opcode>(&self) -> Option<&T>`

Returns a reference to the object within the trait object if it is of type __T, or None if it isn't.

`pub fn downcast_mut<T: Opcode>(&mut self) -> Option<&mut T>`

Returns a mutable reference to the object within the trait object if it is of type __T, or None if it isn't.

Implementors

`impl Opcode for ADDIVx`[src]

`fn execute(&self, processor: &mut Processor)`[src]

`fn assemble(&self) -> (u8, u8)`[src]

`impl Opcode for ADDVxByte`[src]

`fn execute(&self, processor: &mut Processor)`[src]

`fn assemble(&self) -> (u8, u8)`[src]

`impl Opcode for ADDVxVy`[src]

`fn execute(&self, processor: &mut Processor)`[src]

`fn assemble(&self) -> (u8, u8)`[src]

`impl Opcode for ANDVxVy`[src]

`fn execute(&self, _processor: &mut Processor)`[src]

`fn assemble(&self) -> (u8, u8)`[src]

`impl Opcode for CALL`[src]

`fn execute(&self, processor: &mut Processor)`[src]

`fn assemble(&self) -> (u8, u8)`[src]

`fn modified_pc(&self) -> bool`[src]

`impl Opcode for CLS`[src]

`fn execute(&self, processor: &mut Processor)`[src]

`fn assemble(&self) -> (u8, u8)`[src]

`impl Opcode for DRW`[src]

`fn execute(&self, processor: &mut Processor)`[src]

`fn assemble(&self) -> (u8, u8)`[src]

`impl Opcode for InvalidOpcode`[src]

`fn execute(&self, _processor: &mut Processor)`[src]

`impl Opcode for JMP`[src]

`fn execute(&self, processor: &mut Processor)`[src]

`fn modified_pc(&self) -> bool`[src]

`fn assemble(&self) -> (u8, u8)`[src]

`impl Opcode for JPV0Offset`[src]

`fn execute(&self, _processor: &mut Processor)`[src]

`impl Opcode for LDBVx`[src]

`fn execute(&self, processor: &mut Processor)`[src]

`fn assemble(&self) -> (u8, u8)`[src]

`impl Opcode for LDDTVx`[src]

`fn execute(&self, processor: &mut Processor)`[src]

`fn assemble(&self) -> (u8, u8)`[src]

`impl Opcode for LDFVx`[src]

`fn execute(&self, processor: &mut Processor)`[src]

`fn assemble(&self) -> (u8, u8)`[src]

`impl Opcode for LDIAddr`[src]

`fn execute(&self, processor: &mut Processor)`[src]

`fn assemble(&self) -> (u8, u8)`[src]

`impl Opcode for LDIVx`[src]

`fn execute(&self, _processor: &mut Processor)`[src]

`fn assemble(&self) -> (u8, u8)`[src]

`impl Opcode for LDSTVx`[src]

`fn execute(&self, _processor: &mut Processor)`[src]

`fn assemble(&self) -> (u8, u8)`[src]

`impl Opcode for LDVxByte`[src]

`fn execute(&self, processor: &mut Processor)`[src]

`fn assemble(&self) -> (u8, u8)`[src]

`impl Opcode for LDVxDT`[src]

`fn execute(&self, processor: &mut Processor)`[src]

`fn assemble(&self) -> (u8, u8)`[src]

`impl Opcode for LDVxI`[src]

`fn execute(&self, processor: &mut Processor)`[src]

`fn assemble(&self) -> (u8, u8)`[src]

`impl Opcode for LDVxK`[src]

`fn execute(&self, processor: &mut Processor)`[src]

`fn assemble(&self) -> (u8, u8)`[src]

`impl Opcode for LDVxVy`[src]

`fn execute(&self, _processor: &mut Processor)`[src]

`fn assemble(&self) -> (u8, u8)`[src]

`impl Opcode for ORVxVy`[src]

`fn execute(&self, _processor: &mut Processor)`[src]

`fn assemble(&self) -> (u8, u8)`[src]

`impl Opcode for RET`[src]

`fn execute(&self, processor: &mut Processor)`[src]

`fn assemble(&self) -> (u8, u8)`[src]

`fn modified_pc(&self) -> bool`[src]

`impl Opcode for RNDVxByte`[src]

`fn execute(&self, processor: &mut Processor)`[src]

`impl Opcode for SEVxByte`[src]

`fn execute(&self, processor: &mut Processor)`[src]

`fn assemble(&self) -> (u8, u8)`[src]

`impl Opcode for SEVxVy`[src]

`fn execute(&self, _processor: &mut Processor)`[src]

`fn assemble(&self) -> (u8, u8)`[src]

`impl Opcode for SHLVxVy`[src]

`fn execute(&self, _processor: &mut Processor)`[src]

`fn assemble(&self) -> (u8, u8)`[src]

`impl Opcode for SHRVxVy`[src]

`fn execute(&self, _processor: &mut Processor)`[src]

`fn assemble(&self) -> (u8, u8)`[src]

`impl Opcode for SKNPBRDVx`[src]

`fn execute(&self, _processor: &mut Processor)`[src]

`impl Opcode for SKPKBRDVx`[src]

`fn execute(&self, _processor: &mut Processor)`[src]

`impl Opcode for SNEVxByte`[src]

`fn execute(&self, processor: &mut Processor)`[src]

`fn assemble(&self) -> (u8, u8)`[src]

`impl Opcode for SNEVxVy`[src]

`fn execute(&self, _processor: &mut Processor)`[src]

`impl Opcode for SUBNVxVy`[src]

`fn execute(&self, _processor: &mut Processor)`[src]

`fn assemble(&self) -> (u8, u8)`[src]

`impl Opcode for SUBVxVy`[src]

`fn execute(&self, processor: &mut Processor)`[src]

`fn assemble(&self) -> (u8, u8)`[src]

`impl Opcode for XORVxVy`[src]

`fn execute(&self, _processor: &mut Processor)`[src]

`fn assemble(&self) -> (u8, u8)`[src]

Loading content...

[−][src]Trait emul8::internals::opcode::Opcode

Required methods

fn execute(&self, processor: &mut Processor)

Provided methods

fn modified_pc(&self) -> bool

fn assemble(&self) -> (u8, u8)

Methods

impl dyn Opcode

pub fn is<__T: Opcode>(&self) -> bool

pub fn downcast<__T: Opcode>(self: Box<Self>) -> Result<Box<__T>, Box<Self>>

pub fn downcast_rc<__T: Opcode>(self: Rc<Self>) -> Result<Rc<__T>, Rc<Self>>

pub fn downcast_ref<__T: Opcode>(&self) -> Option<&__T>

pub fn downcast_mut<__T: Opcode>(&mut self) -> Option<&mut __T>

Implementors

impl Opcode for ADDIVx[src]

fn execute(&self, processor: &mut Processor)[src]

fn assemble(&self) -> (u8, u8)[src]

impl Opcode for ADDVxByte[src]

fn execute(&self, processor: &mut Processor)[src]

fn assemble(&self) -> (u8, u8)[src]

impl Opcode for ADDVxVy[src]

fn execute(&self, processor: &mut Processor)[src]

fn assemble(&self) -> (u8, u8)[src]

impl Opcode for ANDVxVy[src]

fn execute(&self, _processor: &mut Processor)[src]

fn assemble(&self) -> (u8, u8)[src]

impl Opcode for CALL[src]

fn execute(&self, processor: &mut Processor)[src]

fn assemble(&self) -> (u8, u8)[src]

fn modified_pc(&self) -> bool[src]

impl Opcode for CLS[src]

fn execute(&self, processor: &mut Processor)[src]

fn assemble(&self) -> (u8, u8)[src]

impl Opcode for DRW[src]

fn execute(&self, processor: &mut Processor)[src]

fn assemble(&self) -> (u8, u8)[src]

impl Opcode for InvalidOpcode[src]

fn execute(&self, _processor: &mut Processor)[src]

impl Opcode for JMP[src]

fn execute(&self, processor: &mut Processor)[src]

fn modified_pc(&self) -> bool[src]

fn assemble(&self) -> (u8, u8)[src]

impl Opcode for JPV0Offset[src]

fn execute(&self, _processor: &mut Processor)[src]

impl Opcode for LDBVx[src]

fn execute(&self, processor: &mut Processor)[src]

fn assemble(&self) -> (u8, u8)[src]

impl Opcode for LDDTVx[src]

fn execute(&self, processor: &mut Processor)[src]

fn assemble(&self) -> (u8, u8)[src]

impl Opcode for LDFVx[src]

fn execute(&self, processor: &mut Processor)[src]

fn assemble(&self) -> (u8, u8)[src]

impl Opcode for LDIAddr[src]

fn execute(&self, processor: &mut Processor)[src]

fn assemble(&self) -> (u8, u8)[src]

impl Opcode for LDIVx[src]

fn execute(&self, _processor: &mut Processor)[src]

fn assemble(&self) -> (u8, u8)[src]

impl Opcode for LDSTVx[src]

fn execute(&self, _processor: &mut Processor)[src]

fn assemble(&self) -> (u8, u8)[src]

impl Opcode for LDVxByte[src]

fn execute(&self, processor: &mut Processor)[src]

fn assemble(&self) -> (u8, u8)[src]

impl Opcode for LDVxDT[src]

fn execute(&self, processor: &mut Processor)[src]

fn assemble(&self) -> (u8, u8)[src]

impl Opcode for LDVxI[src]

fn execute(&self, processor: &mut Processor)[src]

fn assemble(&self) -> (u8, u8)[src]

impl Opcode for LDVxK[src]

fn execute(&self, processor: &mut Processor)[src]

fn assemble(&self) -> (u8, u8)[src]

impl Opcode for LDVxVy[src]

fn execute(&self, _processor: &mut Processor)[src]

fn assemble(&self) -> (u8, u8)[src]

impl Opcode for ORVxVy[src]

fn execute(&self, _processor: &mut Processor)[src]

fn assemble(&self) -> (u8, u8)[src]

`fn execute(&self, processor: &mut Processor)`

`fn modified_pc(&self) -> bool`

`fn assemble(&self) -> (u8, u8)`

`impl dyn Opcode`

`pub fn is<__T: Opcode>(&self) -> bool`

`pub fn downcast<T: Opcode>(self: Box<Self>) -> Result<Box<T>, Box<Self>>`

`pub fn downcast_rc<T: Opcode>(self: Rc<Self>) -> Result<Rc<T>, Rc<Self>>`

`pub fn downcast_ref<T: Opcode>(&self) -> Option<&T>`

`pub fn downcast_mut<T: Opcode>(&mut self) -> Option<&mut T>`

`impl Opcode for ADDIVx`[src]

`fn execute(&self, processor: &mut Processor)`[src]

`fn assemble(&self) -> (u8, u8)`[src]

`impl Opcode for ADDVxByte`[src]

`fn execute(&self, processor: &mut Processor)`[src]

`fn assemble(&self) -> (u8, u8)`[src]

`impl Opcode for ADDVxVy`[src]

`fn execute(&self, processor: &mut Processor)`[src]

`fn assemble(&self) -> (u8, u8)`[src]

`impl Opcode for ANDVxVy`[src]

`fn execute(&self, _processor: &mut Processor)`[src]

`fn assemble(&self) -> (u8, u8)`[src]

`impl Opcode for CALL`[src]

`fn execute(&self, processor: &mut Processor)`[src]

`fn assemble(&self) -> (u8, u8)`[src]

`fn modified_pc(&self) -> bool`[src]

`impl Opcode for CLS`[src]

`fn execute(&self, processor: &mut Processor)`[src]

`fn assemble(&self) -> (u8, u8)`[src]

`impl Opcode for DRW`[src]

`fn execute(&self, processor: &mut Processor)`[src]

`fn assemble(&self) -> (u8, u8)`[src]

`impl Opcode for InvalidOpcode`[src]

`fn execute(&self, _processor: &mut Processor)`[src]

`impl Opcode for JMP`[src]

`fn execute(&self, processor: &mut Processor)`[src]

`fn modified_pc(&self) -> bool`[src]

`fn assemble(&self) -> (u8, u8)`[src]

`impl Opcode for JPV0Offset`[src]

`fn execute(&self, _processor: &mut Processor)`[src]

`impl Opcode for LDBVx`[src]

`fn execute(&self, processor: &mut Processor)`[src]

`fn assemble(&self) -> (u8, u8)`[src]

`impl Opcode for LDDTVx`[src]

`fn execute(&self, processor: &mut Processor)`[src]

`fn assemble(&self) -> (u8, u8)`[src]

`impl Opcode for LDFVx`[src]

`fn execute(&self, processor: &mut Processor)`[src]

`fn assemble(&self) -> (u8, u8)`[src]

`impl Opcode for LDIAddr`[src]

`fn execute(&self, processor: &mut Processor)`[src]

`fn assemble(&self) -> (u8, u8)`[src]

`impl Opcode for LDIVx`[src]

`fn execute(&self, _processor: &mut Processor)`[src]

`fn assemble(&self) -> (u8, u8)`[src]

`impl Opcode for LDSTVx`[src]

`fn execute(&self, _processor: &mut Processor)`[src]

`fn assemble(&self) -> (u8, u8)`[src]

`impl Opcode for LDVxByte`[src]

`fn execute(&self, processor: &mut Processor)`[src]

`fn assemble(&self) -> (u8, u8)`[src]

`impl Opcode for LDVxDT`[src]

`fn execute(&self, processor: &mut Processor)`[src]

`fn assemble(&self) -> (u8, u8)`[src]

`impl Opcode for LDVxI`[src]

`fn execute(&self, processor: &mut Processor)`[src]

`fn assemble(&self) -> (u8, u8)`[src]

`impl Opcode for LDVxK`[src]

`fn execute(&self, processor: &mut Processor)`[src]

`fn assemble(&self) -> (u8, u8)`[src]

`impl Opcode for LDVxVy`[src]

`fn execute(&self, _processor: &mut Processor)`[src]

`fn assemble(&self) -> (u8, u8)`[src]

`impl Opcode for ORVxVy`[src]

`fn execute(&self, _processor: &mut Processor)`[src]

`fn assemble(&self) -> (u8, u8)`[src]

`impl Opcode for RET`[src]

`fn execute(&self, processor: &mut Processor)`[src]

`fn assemble(&self) -> (u8, u8)`[src]

`fn modified_pc(&self) -> bool`[src]

`impl Opcode for RNDVxByte`[src]