Struct StandardCodec 

pub struct StandardCodec<const HEADER_SIZE: usize, const ADDR_MSB: u8, const ADDR_LSB: u8, const RW_BIT: u8, const RW_1_IS_READ: bool, const READ_DELAY: usize> {}

This codec represents the most commonly found codecs for SPI devices. It consists of an N-bit big-endian register address, a 1-bit R/W indicator and uses zero initializion for reserved bits. The header is always a multiple of 8-bit in width.

This codec has no information over register sizes or the existence of read/write address-auto-increment which some devices support. It will always send one header and then receive/send the associated register data, so it’s compatible with auto-increment usage, but cannot be used to read or write registers that require interspersing the address between bytes.

Devices often use a mixed mode, where some registers allow auto-increment while others don’t, or where the address is directly associated with a specific, but varying, register size. Therefore, it is up to the user to make sure that accessing a register via this codec is supported by the hardware.

The following generic parameters are available:

Parameter	Type	Description
HEADER_SIZE	usize	The size of the command header in bytes
ADDR_MSB	u8	The bit index of the MSB of the register-address (inclusive)
ADDR_LSB	u8	The bit index of the LSB of the register-address (inclusive)
RW_BIT	u8	The bit index of the RW bit when interpreting the struct in big-endian
RW_1_IS_READ	bool	whether the setting the RW bit signals read-mode (true) or write-mode (false)
READ_DELAY	usize	Number of bytes that we have to wait (send additional zeros) after sending the header until data arrives

Implementations

impl<const HEADER_SIZE: usize, const ADDR_MSB: u8, const ADDR_LSB: u8, const RW_BIT: u8, const RW_1_IS_READ: bool, const READ_DELAY: usize> StandardCodec<HEADER_SIZE, ADDR_MSB, ADDR_LSB, RW_BIT, RW_1_IS_READ, READ_DELAY>

pub fn fill_addr_header<R>(header: &mut [u8])

where R: Register,

Trait Implementations

impl<const HEADER_SIZE: usize, const ADDR_MSB: u8, const ADDR_LSB: u8, const RW_BIT: u8, const RW_1_IS_READ: bool, const READ_DELAY: usize> CodecAsync for StandardCodec<HEADER_SIZE, ADDR_MSB, ADDR_LSB, RW_BIT, RW_1_IS_READ, READ_DELAY>

async fn read_register<R, I>( interface: &mut I, ) -> Result<R, TransportError<Self::Error, I::Error>>

where R: Register<CodecError = Self::Error> + ReadableRegister, I: SpiDevice,

Read this register through the given SPI interface

async fn write_register<R, I>( interface: &mut I, register: impl AsRef<R>, ) -> Result<(), TransportError<Self::Error, I::Error>>

where R: Register<CodecError = Self::Error> + WritableRegister, I: SpiDevice,

Write this register through the given SPI interface

impl<const HEADER_SIZE: usize, const ADDR_MSB: u8, const ADDR_LSB: u8, const RW_BIT: u8, const RW_1_IS_READ: bool, const READ_DELAY: usize> CodecSync for StandardCodec<HEADER_SIZE, ADDR_MSB, ADDR_LSB, RW_BIT, RW_1_IS_READ, READ_DELAY>

fn read_register<R, I>( interface: &mut I, ) -> Result<R, TransportError<Self::Error, I::Error>>

where R: Register<CodecError = Self::Error> + ReadableRegister, I: SpiDevice,

Read this register through the given SPI interface

fn write_register<R, I>( interface: &mut I, register: impl AsRef<R>, ) -> Result<(), TransportError<Self::Error, I::Error>>

where R: Register<CodecError = Self::Error> + WritableRegister, I: SpiDevice,

Write this register through the given SPI interface

impl<const HEADER_SIZE: usize, const ADDR_MSB: u8, const ADDR_LSB: u8, const RW_BIT: u8, const RW_1_IS_READ: bool, const READ_DELAY: usize> RegisterCodec for StandardCodec<HEADER_SIZE, ADDR_MSB, ADDR_LSB, RW_BIT, RW_1_IS_READ, READ_DELAY>

type Error = ()

An error type for codec specific errors